LT1461 LINER [Linear Technology], LT1461 Datasheet - Page 10

• Manufacturer Part Number: LT1461
• Description: Easy-to-Use, Ultra-Tiny, Differential, 16-Bit ADC With I2C Interface
• Manufacturer: LINER [Linear Technology]

APPLICATIONS INFORMATION
LTC2453
Discarding a Conversion Result and Initiating a New
Conversion
It is possible to start a new conversion without reading
the old result, as shown in Figure 7. Following a valid 7-bit
address, a read request (R) bit, and a valid ACK, a STOP
command will start a new conversion.
PRESERVING THE CONVERTER ACCURACY
The LTC2453 is designed to dramatically reduce the conver-
sion result’s sensitivity to device decoupling, PCB layout,
antialiasing circuits, line and frequency perturbations. Nev-
ertheless, in order to preserve the high accuracy capability
of this part, some simple precautions are desirable.
Digital Signal Levels
Due to the nature of CMOS logic, it is advisable to keep
input digital signals near GND or V
range of 0.5V to V
rent leakage from the part.
10
CONVERSION
S
CC
7-BIT ADDRESS
(0010100)
– 0.5V may result in additional cur-
SLEEP
CONVERSION
Figure 7. Start a New Conversion without Reading Old Conversion Result
CONVERSION
R ACK
Figure 6. Consecutive Reading at the Same Confi guration
CC
DATA OUTPUT
. Voltages in the
Figure 5. The LTC2453 Coversion Sequence
READ
S
S
7-BIT ADDRESS
7-BIT ADDRESS
(0010100)
SLEEP
(0010100)
SLEEP
P
CONVERSION
R ACK
R ACK READ (OPTIONAL)
Driving V
In relation to the V
internal high frequency decoupling with damping elements,
which reduce the ADC performance sensitivity to PCB
layout and external components. Nevertheless, the very
high accuracy of this converter is best preserved by careful
low and high frequency power supply decoupling.
A 0.1μF, high quality, ceramic capacitor in parallel with a
10μF ceramic capacitor should be connected between the
V
The 0.1μF capacitor should be placed closest to the ADC
package. It is also desirable to avoid any via in the circuit
path, starting from the converter V
these two decoupling capacitors, and returning to the
converter GND pin. The area encompassed by this circuit
path, as well as the path length, should be minimized.
Very low impedance ground and power planes, and star
connections at both V
The V
CC
DATA OUTPUT
DATA OUTPUT
and GND pins, as close as possible to the package.
CC
READ
S
pin should have three distinct connections: the
CC
7-BIT ADDRESS
and GND
(0010100)
SLEEP
CC
P
P
and GND pins, the LTC2453 combines
CONVERSION
CONVERSION
CC
R
2453 F05
and GND pins, are preferable.
2453 F07
ACK
DATA OUTPUT
CC
READ
pin, passing through
2453 F06
P
CONVERSION
2453f