LT1461 LINER [Linear Technology], LT1461 Datasheet - Page 8

• Manufacturer Part Number: LT1461
• Description: Easy-to-Use, Ultra-Tiny, Differential, 16-Bit ADC With I2C Interface
• Manufacturer: LINER [Linear Technology]

APPLICATIONS INFORMATION
LTC2453
Reference Voltage Range
This converter accepts a truly differential external reference
voltage. The absolute/common mode voltage range for
REF
the device (GND to V
V
The LTC2453 differential reference input range is 2.5V to
V
V
Input Voltage Range
For most applications, V
these conditions the output code is given (see Data Format
section) as 32768 • (V
output of the LTC2453 is clamped at a maximum value of
32767 and clamped at a minimum value of –32768.
The LTC2453 includes a proprietary system that can,
typically, correctly digitize each input 8LSB above V
and below V
As an example (Figure 2), if the user desires to measure
a signal slightly below ground, the user could set V
V
code would be approximately 0. If V
–1.22 mV, the output code would be approximately –8.
8
REF
CC
CC
REF
. For the simplest operation, REF
Figure 2. Output Code vs V
+
and REF
+
–
and REF
must be >(2.5V + V
= GND, and V
REF
–
–12
–16
–20
20
16
12
–4
–8
–0.001
–
can be shorted to GND.
8
4
0
–
pins covers the entire operating range of
, if the LTC2453’s output is not clamped.
–0.005
REF
CC
). For correct converter operation,
IN
+
REF
= 5V. If V
+
REF
IN
–
– V
V
0
≤ (V
IN
+
SIGNALS
BELOW
GND
–
+
with V
).
/V
IN
REF
0.005
IN
–
)/(V
+
+
IN
IN
, V
+
IN
–
+
REF
IN
= GND, the output
0.001
= 0 and V
+
can be shorted to
–
= GND – 8LSB =
) ≤ V
+
2453 F02
– V
0.0015
REF
REF
REF
+
–
. Under
–
= 0
). The
IN
REF
–
=
+
I
The LTC2453 communicates through an I
I
multiple devices and masters on a single bus. The con-
nected devices can only pull the data line (SDA) LOW and
never drive it HIGH. SDA must be externally connected to
the supply through a pull-up resistor. When the data line
is free, it is HIGH. Data on the I
at rates up to 100kbits/s in the Standard-Mode and up to
400kbits/s in the Fast-Mode.
Each device on the I
address stored in that device and can operate either as
a transmitter or receiver, depending on the function of
the device. In addition to transmitters and receivers,
devices can also be considered as masters or slaves when
performing data transfers. A master is the device which
initiates a data transfer on the bus and generates the
clock signals to permit that transfer. Devices addressed
by the master are considered a slave. The address of the
LTC2453 is 0010100.
The LTC2453 can only be addressed as a slave. It can only
transmit the last conversion result. The serial clock line,
SCL, is always an input to the LTC2453 and the serial data
line SDA is bidirectional. Figure 3 shows the defi nition of
the I
The START and STOP Conditions
A START (S) condition is generated by transitioning SDA
from HIGH to LOW while SCL is HIGH. The bus is consid-
ered to be busy after the START condition. When the data
transfer is fi nished, a STOP (P) condition is generated by
transitioning SDA from LOW to HIGH while SCL is HIGH.
The bus is free after a STOP is generated. START and STOP
conditions are always generated by the master.
When the bus is in use, it stays busy if a repeated START
(Sr) is generated instead of a STOP condition. The repeated
START timing is functionally identical to the START and
is used for reading from the device before the initiation
of a new conversion.
2
2
C INTERFACE
C interface is a 2-wire open-drain interface supporting
2
C timing.
2
C bus is recognized by a unique
2
C bus can be transferred
2
C interface. The
2453f