LTC1864 LINER [Linear Technology], LTC1864 Datasheet - Page 11

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LTC1864

Manufacturer Part Number
LTC1864
Description
?Power, 16-Bit, 250ksps 1- and 2-Channel ADCs in MSOP
Manufacturer
LINER [Linear Technology]
Datasheet

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APPLICATIO S I FOR ATIO
GENERAL ANALOG CONSIDERATIONS
Grounding
The LTC1864/LTC1865 should be used with an analog
ground plane and single point grounding techniques. Do
not use wire wrapping techniques to breadboard and
evaluate the device. To achieve the optimum performance,
use a printed circuit board. The ground pins (AGND and
DGND for the LTC1865 MSOP package and GND for the
LTC1864 and LTC1865 SO-8 package) should be tied
directly to the analog ground plane with minimum lead
length.
Bypassing
For good performance, the V
of noise and ripple. Any changes in the V
with respect to ground during the conversion cycle can
U
U
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CC
and V
W
REF
pins must be free
CC
/V
Figure 5. LTC1865 Transfer Curve
REF
U
*V
(SELECTED “–” CHANNEL)
REFER TO TABLE 1
IN
voltage
= (SELECTED “+” CHANNEL) –
induce errors or noise in the output code. Bypass the V
and V
minimum of 1µF tantalum. Keep the bypass capacitor
leads as short as possible.
Analog Inputs
Because of the capacitive redistribution A/D conversion
techniques used, the analog inputs of the LTC1864/
LTC1865 have capacitive switching input current spikes.
These current spikes settle quickly and do not cause a
problem if source resistances are less than 200Ω or high
speed op amps are used (e.g., the LT
LT1807, LT1810, LT1630, LT1226 or LT1215). But if large
source resistances are used, or if slow settling op amps
drive the inputs, take care to ensure the transients caused
by the current spikes settle completely before the conver-
sion begins.
REF
pins directly to the analog ground plane with a
LTC1864/LTC1865
1864 F05
V
IN
*
®
1211, LT1469,
sn18645 18645fs
11
CC

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