LTC2413 LINER [Linear Technology], LTC2413 Datasheet - Page 28

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LTC2413

Manufacturer Part Number
LTC2413
Description
24-Bit No Latency ADC, with Simultaneous 50Hz/60Hz Rejection
Manufacturer
LINER [Linear Technology]
Datasheet

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APPLICATIO S I FOR ATIO
LTC2413
Figure 27 shows the typical INL error due to the source
resistance driving the REF
values are used. The effect of the source resistance on the
two reference pins is additive with respect to this INL error.
In general, matching of source impedance for the REF
and REF
user is thus advised to minimize the combined source
impedance driving the REF
try to match it.
The magnitude of the dynamic reference current depends
upon the size of the very stable internal sampling capaci-
tors and upon the accuracy of the converter sampling
clock. The accuracy of the internal clock over the entire
temperature and power supply range is typical better than
28
Figure 23. +FS Error vs R
Figure 25. +FS Error vs R
pins does not help the gain or the INL error. The
–180
–270
–360
–450
–90
–10
–20
–30
–40
–50
1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05
0
0
0 100 200 300 400 500 600 700 800 900 1000
V
REF
REF
IN
IN
F
T
V
REF
REF
IN
IN
F
T
O
A
O
CC
CC
A
+
+
= GND
= 25 C
= GND
= 25 C
U
+
= 3.75V
+
= 5V
= 1.25V
= 5V
= 2.5V
C
= 5V
= 5V
= GND
C
REF
= 5V
= GND
C
REF
REF
C
= 0.001 F
SOURCE
SOURCE
REF
= 0.01 F
= 100pF
U
+
R
= 0pF
R
+
SOURCE
SOURCE
or REF
and REF
C
at REF
at REF
REF
( )
( )
= 1 F, 10 F
C
C
REF
REF
W
+
pins when large C
+
or REF
or REF
= 0.01 F
= 0.1 F
pins rather than to
2413 F25
2413 F23
(Small C
(Large C
U
REF
REF
REF
)
)
+
0.5%. Such a specification can also be easily achieved by
an external clock. When relatively stable resistors
(50ppm/ C) are used for the external source impedance
seen by REF
current gain error will be insignificant (about 1% of its
value over the entire temperature and voltage range). Even
for the most stringent applications, a one-time calibration
operation may be sufficient.
In addition to the reference sampling charge, the reference
pins ESD protection diodes have a temperature dependent
leakage current. This leakage current, nominally 1nA
( 10nA max), results in a small gain error. A 100 source
resistance will create a 0.05 V typical and 0.5 V maxi-
mum full-scale error.
Figure 24. –FS Error vs R
Figure 26. –FS Error vs R
+
450
360
270
180
50
40
30
20
10
90
1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05
and REF
0
0
0 100 200 300 400 500 600 700 800 900 1000
V
REF
REF
IN
IN
F
T
V
REF
REF
IN
IN
F
T
O
A
O
A
CC
CC
+
+
= GND
= 25 C
= GND
= 25 C
+
= GND
+
= 1.25V
C
= 2.5V
= 3.75V
= 5V
= 5V
C
REF
= 5V
= GND
= 5V
= GND
C
REF
REF
C
, the expected drift of the dynamic
= 0.001 F
SOURCE
SOURCE
REF
= 0.01 F
= 100pF
R
R
= 0pF
SOURCE
SOURCE
at REF
at REF
C
REF
( )
( )
C
REF
= 1 F, 10 F
C
+
+
REF
= 0.01 F
or REF
or REF
= 0.1 F
2413 F24
2413 F26
(Small C
(Large C
sn2413 2413fs
REF
REF
)
)

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