LTC3026 LINER [Linear Technology], LTC3026 Datasheet - Page 13

• Manufacturer Part Number: LTC3026
• Description: 1.5A Low Input Voltage VLDO Linear Regulator
• Manufacturer: LINER [Linear Technology]

OPERATIO
Layout Considerations
Connection from BST and OUT pins to their respective
ceramic bypass capacitor should be kept as short as
possible. The ground side of the bypass capacitors should
be connected directly to the ground plane for best results
or through short traces back to the GND pin of the
part. Long traces will increase the effective series ESR
and inductance of the capacitor which can degrade
performance.
With the boost converter enabled, the SW pin will be
switching between ground and 5V whenever the BST pin
needs to be recharged. The transition edge rates of the SW
pin can be quite fast (~10ns). Thus care must be taken to
make sure the SW node does not couple capacitively to
other nodes (especially the ADJ pin). Additionally, stray
U
Figure 7. Suggested Layout
C
VIA CONNECTION TO GND PLANE
BST
1
2
3
4
5
C
IN
IN
GND
SW
BST
IN
SHDN
capacitance to this node reduces the efficiency and amount
of current available from the boost converter. For these
reasons it is recommended that the SW pin be connected
to the switching inductor with as short a trace as possible.
If the user has any sensitive nodes near the SW node, a
ground shield may be placed between the two nodes to
reduce coupling.
Because the ADJ pin is relatively high impedance (depend-
ing on the resistor divider used), stray capacitance at this
pin should be minimized (<10pF) to prevent phase shift in
the error amplifier loop. Additionally special attention
should be given to any stray capacitances that can couple
external signals onto the ADJ pin producing undesirable
output ripple. For optimum performance connect the ADJ
pin to R1 and R2 with a short PCB trace and minimize all
other stray capacitance to the ADJ pin.
C
OUT
OUT
ADJ
OUT
PG
10
9
8
7
6
3026 F05
R2
R1
LTC3026
13
3026f