LTC3412 LINER [Linear Technology], LTC3412 Datasheet - Page 12

• Manufacturer Part Number: LTC3412
• Description: 2.5A, 4MHz, Monolithic Synchronous Step-Down Regulator
• Manufacturer: LINER [Linear Technology]

LTC3412
APPLICATIO S I FOR ATIO
The LTC3412 contains an internal soft-start clamp that
gradually raises the clamp on I
pulled above 2V. The full current range becomes available
on I
period is desired, the clamp on I
with a resistor and capacitor on the RUN/SS pin as shown
in Figure 1. The soft-start duration can be calculated by
using the following formula:
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses: V
The V
loss at very low load currents whereas the I
dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve at
very low load currents can be misleading since the actual
power lost is of no consequence.
1. The V
the DC bias current as given in the electrical characteristics
and the internal main switch and synchronous switch gate
charge currents. The gate charge current results from
switching the gate capacitance of the internal power
MOSFET switches. Each time the gate is switched from
high to low to high again, a packet of charge dQ moves
from V
of V
continuous mode, I
are the gate charges of the internal top and bottom
12
Efficiency = 100% – (L1 + L2 + L3 + ...)
t
SS
TH
IN
IN
that is typically larger than the DC bias current. In
IN
after 1024 switching cycles. If a longer soft-start
=
quiescent current loss dominates the efficiency
IN
R C
IN
to ground. The resulting dQ/dt is the current out
SS SS
quiescent current is due to two components:
quiescent current and I
ln
U
GATECHG
⎛
⎜
⎝
V
IN
V
−
U
IN
. 1 8
=f(Q
TH
V
T
⎞
⎟
⎠
TH
after the RUN/SS pin is
+ Q
(
2
Seconds
W
R losses.
can be set externally
B
) where Q
)
U
T
2
and Q
R loss
B
switches. Both the DC bias and gate charge losses are
proportional to V
pronounced at higher supply voltages.
2. I
internal switches, R
tinuous mode the average output current flowing through
inductor L is “chopped” between the main switch and the
synchronous switch. Thus, the series resistance looking
into the SW pin is a function of both top and bottom
MOSFET R
The R
obtained from the Typical Performance Characteristics
curves. Thus, to obtain I
and multiply the result by the square of the average output
current.
Other losses including C
losses and inductor core losses generally account for less
than 2% of the total loss.
Thermal Considerations
In most applications, the LTC3412 does not dissipate
much heat due to its high efficiency. But, in applications
where the LTC3412 is running at high ambient tempera-
ture with low supply voltage and high duty cycles, such as
in dropout, the heat dissipated may exceed the maximum
junction temperature of the part. If the junction tempera-
ture reaches approximately 150°C, both power switches
will be turned off and the SW node will become high
impedance.
To avoid the LTC3412 from exceeding the maximum
junction temperature, the user will need to do some
thermal analysis. The goal of the thermal analysis is to
determine whether the power dissipated exceeds the
maximum junction temperature of the part. The tempera-
ture rise is given by:
where P
is the thermal resistance from the junction of the die to the
ambient temperature.
R
T
2
R
SW
R losses are calculated from the resistances of the
DS(ON)
= (P
= (R
D
is the power dissipated by the regulator and θ
D
DS(ON)
)(θ
DS(ON)TOP
for both the top and bottom MOSFETs can be
JA
)
IN
and the duty cycle (DC) as follows:
SW
and thus their effects will be more
)(DC) + (R
and external inductor R
2
R losses, simply add R
IN
and C
DS(ON)BOT
OUT
ESR dissipative
)(1 – DC)
L
. In con-
SW
to R
3412fb
JA
L