LTC3413 LINER [Linear Technology], LTC3413 Datasheet - Page 5

• Manufacturer Part Number: LTC3413
• Description: 3A, 2MHz Monolithic Synchronous Regulator for DDR/QDR Memory Termination
• Manufacturer: LINER [Linear Technology]

PI FU CTIO S
SV
SGND with a capacitor. SV
PV
be less than 0.5V.
PGOOD (Pin 2): Power Good Output. Open-drain logic
output that is pulled to ground when the output voltage is
not within 10% of regulation point.
I
current comparator threshold increases with this control
voltage. Nominal voltage range for this pin is from 0.2V to
1.4V with 0.6V corresponding to the zero-sense voltage
(zero current).
V
from the output.
R
to ground from this pin sets the switching frequency.
V
of the internal error amplifier senses one-half of the
voltage at this pin through a resistor divider.
FU CTIO AL DIAGRA
TH
FB
REF
T
IN
IN
(Pin 5): Oscillator Resistor Input. Connecting a resistor
U
U
(Pin 3): Error Amplifier Compensation Point. The
(Pin 4): Feedback Pin. Receives the feedback voltage
, however, the difference between SV
(Pin 6): Reference Voltage Input. The positive input
(Pin 1): Signal Input Supply. Decouple this pin to
U
U
PGOOD
SGND
V
8
4
2
FB
U
SV
SV
1
IN
IN
0.9V
1.1V
2
2
REF
REF
V
IN
REF
6
must be greater or equal to
+
–
+
–
+
–
W
AMPLIFIER
ERROR
IN
and PV
IN
OSCILLATOR
I
TH
3
must
R
5
T
COMPENSATION
RECOVERY
SLOPE
RUN/SS (Pin 7): Run Control and Soft-Start Input. Forcing
this pin below 0.5V shuts down the LTC3413. In shutdown
all functions are disabled drawing < 1 A of supply current.
A capacitor to ground from this pin sets the ramp time to
full output current.
SGND (Pin 8): Signal Ground. All small-signal compo-
nents and compensation components should connect to
this ground, which in turn connects to PGND at one point.
PV
to PGND with a capacitor.
SW (Pins 10, 11, 14, 15): Switch Node Connection to
Inductor. This pin connects to the drains of the internal
main and synchronous power MOSFET switches.
PGND (Pins 12, 13): Power Ground. Connect this pin
closely to the (–) terminal of C
EXPOSED PAD (Pin 17): Should be connected to SGND.
RUN/SS
LOGIC
RUN
7
IN
(Pins 9, 16): Power Input Supply. Decouple this pin
COMPENSATION
NMOS CURRENT
COMPARATOR
SLOPE
PMOS CURRENT
COMPARATOR
+
–
+
–
PV
9
IN
IN
and C
PV
16
IN
3413 BD
10
11
14
15
12 PGND
13
SW
SW
SW
SW
PGND
OUT
LTC3413
.
sn3413 3413fs
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