LTC3605 LINER [Linear Technology], LTC3605 Datasheet - Page 6

• Manufacturer Part Number: LTC3605
• Description: 20V, 5A Synchronous Step-Down Regulator
• Manufacturer: LINER [Linear Technology]

PIN FUNCTIONS
LTC3605A
RT (Pin 1): Oscillator Frequency Programming Pin. Con-
nect an external resistor (between 200k to 40k) from RT
to SGND to program the frequency from 800kHz to 4MHz.
Since the synchronization range is ±30% of set frequency,
be sure that the set frequency is within this percentage
range of the external clock to ensure frequency lock.
PHMODE (Pin 2): Control Input to Phase Selector. Deter-
mines the phase relationship between internal oscillator
and CLKOUT. Tie it to INTV
to SGND for 3-phase operation, and tie it to INTV
4-phase operation.
MODE (Pin 3): Operation Mode Select. Tie this pin to
INTV
output loads. Tying it to SGND enables discontinuous mode
operation at light loads. Tying this pin to INTV
off the internal clock during discontinuous intervals.
FB (Pin 4): Output Feedback Voltage. Input to the error
amplifier that compares the feedback voltage to the internal
0.6V reference voltage. This pin is normally connected to
a resistive divider from the output voltage.
TRACK/SS (Pin 5): Output Tracking and Soft-Start Pin.
Allows the user to control the rise time of the output volt-
age. Putting a voltage below 0.6V on this pin bypasses
the internal reference input to the error amplifier, instead
it servos the FB pin to the TRACK voltage. Above 0.6V,
the tracking function stops and the internal reference
resumes control of the error amplifier. There’s an internal
2µA pull-up current from INTV
capacitor here provides soft-start function.
ITH (Pin 6): Error Amplifier Output and Switching Regu-
lator Compensation Point. The current comparator’s trip
threshold is linearly proportional to this voltage, whose
normal range is from 0.3V to 1.8V. Tying this pin to INTV
activates internal compensation and output voltage po-
sitioning, raising V
value at I
RUN (Pin 7): Run Control Input. Enables chip operation
by tying RUN above 1.2V. Tying it below 1.1V shuts down
the part.
PGOOD (Pin 8): Output Power Good with Open-Drain Logic.
PGOOD is pulled to ground when the voltage on the FB pin
is not within ±10% of the internal 0.6V reference.
6
CC
to force continuous synchronous operation at all
OUT
= 0 and 1.5% lower at I
OUT
to 1.5% higher than the nominal
CC
for 2-phase operation, tie it
CC
on this pin, so putting a
OUT
= 5A.
CC
/2 shuts
CC
/2 for
CC
V
the on-time comparator. Tying this pin to the output volt-
age makes the on-time proportional to V
switching frequency constant at different V
when V
no longer remain constant.
PGND (Pin 10, Exposed Pad Pin 25): Power Ground.
Return path of internal power MOSFETs. Connect this
pin to the negative terminals of the input capacitor and
output capacitor. The exposed pad must be soldered to
the PCB ground for electrical contact and rated thermal
performance.
SW (Pins 11 to 16): Switch Node Connection to External
Inductor. Voltage swing of SW is from a diode voltage
drop below ground to PV
PV
chip power MOSFETs.
SV
on-chip 3.3V regulator. Connect a (1Ω to 10Ω) resistor
between SV
capacitor.
BOOST (Pin 20): Boosted Floating Driver Supply for Inter-
nal Top Power MOSFET. The (+) terminal of the bootstrap
capacitor connects here. This pin swings from a diode
voltage drop below INTV
INTV
internal power drivers and control circuits are powered
from this voltage. Decouple this pin to power ground with
a minimum of 1µF low ESR ceramic capacitor.
SGND (Pin 22): Signal Ground Connection.
CLKOUT (Pin 23): Output Clock Signal for PolyPhase
Operation. The phase of CLKOUT with respect to CLKIN
is determined by the state of the PHMODE pin. CLKOUT’s
peak-to-peak amplitude is INTV
CLKIN (Pin 24): External Synchronization Input to Phase
Detector. This pin is internally terminated to SGND with 20k.
The phase-locked loop will force the top power NMOS’s
turn on signal to be synchronized with the rising edge of
the CLKIN signal.
ON
IN
IN
(Pin 9): On-Time Voltage Input. Voltage trip point for
CC
(Pins 17, 18): Power V
(Pin 19): Signal V
ON
(Pin 21): Internal 3.3V Regulator Output. The
is <0.6V or >6V, then switching frequency will
IN
and PV
IN
and bypass to GND with a 0.1µF
IN
CC
IN
. Filtered input voltage to the
.
up to PV
IN
. Input voltage to the on-
CC
to GND.
IN
+ INTV
OUT
OUT
and keeps the
CC
. However,
.
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