LTC3851 LINER [Linear Technology], LTC3851 Datasheet - Page 11

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LTC3851

Manufacturer Part Number
LTC3851
Description
Synchronous Step-Down Switching Regulator Controller
Manufacturer
LINER [Linear Technology]
Datasheet

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the error amplifi er, EA, will decrease the voltage on the I
pin. When the I
sleep signal goes high (enabling “sleep” mode) and both
external MOSFETs are turned off.
In sleep mode, the load current is supplied by the output
capacitor. As the output voltage decreases, the EA’s output
begins to rise. When the output voltage drops enough, the
sleep signal goes low, and the controller resumes normal
operation by turning on the top external MOSFET on the
next cycle of the internal oscillator. When a controller is
enabled for Burst Mode operation, the inductor current is
not allowed to reverse. The reverse current comparator,
I
inductor current reaches zero, preventing it from revers-
ing and going negative. Thus, the controller operates in
discontinuous operation. In forced continuous operation,
the inductor current is allowed to reverse at light loads or
under large transient conditions. The peak inductor cur-
rent is determined by the voltage on the I
normal operation. In this mode the effi ciency at light loads
is lower than in Burst Mode operation. However, continu-
ous mode has the advantages of lower output ripple and
less interference to audio circuitry.
When the MODE/PLLIN pin is connected to GND, the
LTC3851 operates in PWM pulse-skipping mode at light
loads. At very light loads the current comparator, I
remain tripped for several cycles and force the external top
MOSFET to stay off for the same number of cycles (i.e.,
skipping pulses). The inductor current is not allowed to
reverse (discontinuous operation). This mode, like forced
continuous operation, exhibits low output ripple as well as
OPERATION
REV
, turns off the bottom external MOSFET just before the
TH
voltage drops below 0.4V, the internal
TH
pin, just as in
CMP
, may
TH
low audio noise and reduced RF interference as compared
to Burst Mode operation. It provides higher low current
effi ciency than forced continuous mode, but not nearly as
high as Burst Mode operation.
Frequency Selection and Phase-Locked Loop
(FREQ/PLLFLTR and MODE/PLLIN Pins)
The selection of switching frequency is a trade-off between
effi ciency and component size. Low frequency operation
increases effi ciency by reducing MOSFET switching losses,
but requires larger inductance and/or capacitance to main-
tain low output ripple voltage. The switching frequency
of the LTC3851 can be selected using the FREQ/PLLFLTR
pin. If the MODE/PLLIN pin is not being driven by an ex-
ternal clock source, the FREQ/PLLFLTR pin can be used
to program the controller’s operating frequency from
250kHz to 750kHz.
A phase-locked loop (PLL) is available on the LTC3851
to synchronize the internal oscillator to an external clock
source that is connected to the MODE/PLLIN pin. The
controller operates in forced continuous mode of operation
when it is synchronized. A series RC should be connected
between the FREQ/PLLFLTR pin and GND to serve as the
PLL’s loop fi lter.
Output Overvoltage Protection
An overvoltage comparator, OV, guards against transient
overshoots (>10%) as well as other more serious con-
ditions that may overvoltage the output. In such cases,
the top MOSFET is turned off and the bottom MOSFET is
turned on until the overvoltage condition is cleared.
LTC3851
11
3851f

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