LTC3851 LINER [Linear Technology], LTC3851 Datasheet - Page 16

• Manufacturer Part Number: LTC3851
• Description: Synchronous Step-Down Switching Regulator Controller
• Manufacturer: LINER [Linear Technology]

LTC3851
APPLICATIONS INFORMATION
mode, the TK/SS voltage is substantially higher than
0.8V at steady-state and effectively turns off D1. D2 and
D3 will therefore conduct the same current and offer
tight matching between V
0.8V reference. In the ratiometric mode, however, TK/SS
equals 0.8V at steady-state. D1 will divert part of the bias
current to make V
Although this error is minimized by the exponential I-V
characteristic of the diode, it does impose a fi nite amount
of output voltage deviation. Furthermore, when the master
supply’s output experiences dynamic excursion (under
load transient, for example), the slave channel output will
be affected as well. For better output regulation, use the
coincident tracking mode instead of ratiometric.
INTV
The LTC3851 features a PMOS low dropout linear regula tor
(LDO) that supplies power to INTV
INTV
’s internal circuitry. The LDO regulates the voltage at the
INTV
The LDO can supply a peak current of 50mA and must
be bypassed to ground with a minimum of 2.2μF ceramic
capacitor or low ESR electrolytic capacitor. No matter
16
CC
CC
CC
Figure 5. Equivalent Input Circuit of Error Amplifi er
powers the gate drivers and much of the LTC3851
Regulator
pin to 5V.
TK/SS
0.8V
V
FB
D1
FB
V
MASTER
slightly lower than 0.8V.
I
D2
TK/SS
(4a) Coincident Tracking Setup
PIN
TO
3851 F05
I
D3
FB
and the internal precision
–
+
R3
R4
EA
CC
Figure 4. Setup for Coincident and Ratiometric Tracking
from the V
PIN
V
TO
FB
IN
R3
R4
supply.
V
OUT
what type of bulk capaci tor is used, an additional 0.1μF
ceramic capacitor placed directly adjacent to the INTV
and GND pins is highly recommended. Good bypassing
is needed to supply the high transient currents required
by the MOSFET gate drivers.
High input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the maxi-
mum junction temperature rating for the LTC3851 to be
exceeded. The INTV
gate charge current, is supplied by the 5V LDO.
Power dissipation for the IC in this case is highest and
is approximately equal to V
current is dependent on operating frequency as discussed
in the Effi ciency Considerations section. The junction tem-
perature can be estimated by using the equa tions given
in Note 3 of the Electrical Characteristics. For example,
the LTC3851 INTV
from a 36V supply in the GN package:
To prevent the maximum junction temperature from being
exceeded, the input supply current must be checked while
operating in continuous conduction mode (MODE/PLLIN
= INTV
Topside MOSFET Driver Supply (C
An external bootstrap capacitor C
BOOST pin supplies the gate drive voltage for the topside
MOSFET. Capacitor C
though external diode D
is low. When the topside MOSFET is to be turned on, the
driver places the C
MOSFET. This enhances the MOSFET and turns on the
topside switch. The switch node voltage, SW, rises to V
V
MASTER
T
TK/SS
J
PIN
(4b) Ratiometric Tracking Setup
= 70°C + (17mA)(36V)(90°C/W) = 125°C
TO
CC
) at maximum V
R1
R2
CC
B
CC
voltage across the gate source of the
B
current is limited to less than 17mA
in the Functional Diagram is charged
PIN
V
current, which is dominated by the
TO
FB
B
IN
from INTV
.
IN
R3
R4
3851 F04
• I
INTVCC
V
OUT
B
B
, D
CC
connected to the
. The gate charge
when the SW pin
B
)
3851f
CC
IN