PI7C7300 Pericom Semiconductor Corporation, PI7C7300 Datasheet - Page 84

• Manufacturer Part Number: PI7C7300
• Description: 3-PORT PCI-to-PCI BRIDGE
• Manufacturer: Pericom Semiconductor Corporation

14.1.31
14.1.32
14.1.33
UPSTREAM (S1 or S2 to P) MEMORY BASE REGISTER –
OFFSET 50h
UPSTREAM (S1 or S2 to P) MEMORY LIMIT REGISTER –
OFFSET 50h
UPSTREAM (S1 or S2 to P) MEMORY BASE UPPER 32-BITS
REGISTER – OFFSET 54h
Bit
30:28
31
Bit
3:0
15:4
Bit
19:16
31:20
Bit
31:0
Function
Secondary Bus
Master
Preemption
Control
Preemption
Function
64 bit addressing
Upstream
Memory Base
Address
Function
64 bit addressing
Upstream
Memory Limit
Address
Function
Upstream
Memory Base
Address
Type
R/W
R/W
Type
R/O
R/W
Type
R/O
R/W
Type
R/W
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Description
Sets the number of clocks for time-to-preempt after another master
request.
000: 32 clocks
001: 8 clocks
010: 16 clocks
011: 64 clocks
100: 128 clocks
Reset to 000
Sets preemption.
0: preemption ON
1: preemption OFF
Reset to 0
Description
0: 32 bit addressing
1: 64 bit addressing
Reset to 1
Controls upstream memory base address.
Reset to 00000000h
Description
0: 32 bit addressing
1: 64 bit addressing
Reset to 1
Controls upstream memory limit address.
Reset to 000FFFFFh
Description
Defines bits [63:32] of the upstream memory base
Reset to 0
3-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
09/25/03 Revision 1.09
PI7C7300A