M48T128 ST Microelectronics, M48T128 Datasheet - Page 10

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M48T128

Manufacturer Part Number
M48T128
Description
3.3V-5V 1 Mbit 128Kb x8 TIMEKEEPER SRAM
Manufacturer
ST Microelectronics
Datasheet

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M48T128Y, M48T128V
Figure 9. Chip Enable Controlled, Write AC Waveforms
CALIBRATING THE CLOCK
The M48T128Y/V is driven by a quartz controlled
oscillator with a nominal frequency of 32,768Hz.
The devices are factory calibrated at 25°C and
tested for accuracy. Clock accuracy will not ex-
ceed 35 ppm (parts per million) oscillator frequen-
cy error at 25°C, which equates to about ±1.53
minutes per month. When the Calibration circuit is
properly employed, accuracy improves to better
than +4 ppm at 25°C. The oscillation rate of crys-
tals changes with temperature.
The
counter correction. The calibration circuit adds or
subtracts counts from the oscillator divider circuit
at the divide by 128 stage, as shown in Figure 10.
The number of times pulses which are blanked
(subtracted, negative calibration) or split (added,
positive calibration) depends upon the value load-
ed into the five Calibration bits found in the Control
Register. Adding counts speeds the clock up, sub-
tracting counts slows the clock down. The Calibra-
tion bits occupy the five lower order bits (D4-D0) in
the Control Register 1FFF8h. These bits can be
set to represent any value between 0 and 31 in bi-
nary form. Bit D5 is a Sign bit; '1' indicates positive
calibration, '0' indicates negative calibration. Cali-
bration occurs within a 64 minute cycle. The first
62 minutes in the cycle may, once per minute,
have one second either shortened by 128 or
lengthened by 256 oscillator cycles. If a binary '1'
is loaded into the register, only the first 2 minutes
10/14
M48T128Y/V
A0-A16
E
W
DQ0-DQ7
design
tAVEL
employs
tAVWL
periodic
tAVEH
tAVAV
VALID
tELEH
in the 64 minute cycle will be modified; if a binary
6 is loaded, the first 12 will be affected, and so on.
Therefore, each calibration step has the effect of
adding 512 or subtracting 256 oscillator cycles for
every 125, 829, 120 actual oscillator cycles, that is
+4.068 or –2.034 ppm of adjustment per calibra-
tion step in the calibration register. Assuming that
the oscillator is running at exactly 32,768Hz, each
of the 31 increments in the Calibration byte would
represent +10.7 or –5.35 seconds per month
which corresponds to a total range of +5.5 or –2.75
minutes per month. Figure 10 illustrates a TIME-
KEEPER calibration waveform. One method is
available for ascertaining how much calibration a
given M48T128Y/V may require. This involves set-
ting the clock, letting it run for a month and com-
paring it to a known accurate reference and
recording deviation over a fixed period of time.
Calibration values, including the number of sec-
onds lost or gained in a given period, can be found
in STMicroelectronics Application Note: TIME-
KEEPER CALIBRATION. This allows the designer
to give the end user the ability to calibrate the
clock as the environment requires, even if the final
product is packaged in a non-user serviceable en-
closure. The designer could provide a simple utility
that accesses the Calibration byte. For example, a
deviation of 21 seconds slow over a period of 30
days would indicate a –8 ppm oscillator frequency
error, requiring a +2(WR100010) to be loaded into
the Calibration Byte for correction.
tDVWH
DATA INPUT
tWHDX
tEHAX
AI02383

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