X1288 Xicor, X1288 Datasheet - Page 7

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X1288

Manufacturer Part Number
X1288
Description
2-Wire RTC Real Time Clock/Calendar/CPU Supervisor with EEPROM
Manufacturer
Xicor
Datasheet

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Preliminary Information
AC Specifications (T
Notes: (1) This parameter is not 100% tested.
TIMING DIAGRAMS
Bus Timing
REV 1.1.30 3/24/04
SCL
SDA IN
SDA OUT
Symbol
t
t
t
t
t
HD:STA
SU:DAT
HD:DAT
SU:STO
SU:STA
t
(2) Cb = total capacitance of one bus line in pF.
t
f
t
HIGH
LOW
t
SCL
t
BUF
Cb
t
DH
t
AA
t
IN
R
F
t
SU:STA
SCL Clock Frequency
Pulse width Suppression Time at inputs
SCL LOW to SDA Data Out Valid
Time the bus must be free before a new transmission can start
Clock LOW Time
Clock HIGH Time
Start Condition Setup Time
Start Condition Hold Time
Data In Setup Time
Data In Hold Time
Stop Condition Setup Time
Data Output Hold Time
SDA and SCL Rise Time
SDA and SCL Fall Time
Capacitive load for each bus line
A
= -40°C to +85°C, VCC = +2.7V to +5.5V, unless otherwise specified.)
t
HD:STA
t
F
t
SU:DAT
Parameter
t
HIGH
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t
LOW
t
HD:DAT
t
R
t
AA
t
DH
20 +.1Cb
20 +.1Cb
Min.
50
100
1.3
1.3
0.6
0.6
0.6
0.6
50
0
(1)
t
(1)(2)
(1)(2)
BUF
t
SU:STO
Max. Units
400
300
300
400
0.9
X1288
kHz
7 of 31
pF
ns
µs
µs
µs
µs
µs
µs
ns
µs
µs
ns
ns
ns

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