CS5351-BS Cirrus Logic, CS5351-BS Datasheet - Page 7

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CS5351-BS

Manufacturer Part Number
CS5351-BS
Description
108 dB/ 192 kHz/ Multi-Bit Audio A/D Converter
Manufacturer
Cirrus Logic
Datasheet
In Master mode, LRCK and SCLK operate as outputs. The left/right and serial clocks are internally derived
from the master clock with the left/right clock equal to Fs and the serial clock equal to 64x Fs, as shown
in Figure 2. Refer to Table 2 for common master clock frequencies
DS565PP2
3.2.1
MCLK
Master Mode
SAMPLE RATE (kHz)
176.4
÷ 1
÷ 2
44.1
88.2
192
32
48
64
96
Table 2. CS5351 Common Master Clock Frequencies
MDIV
1
0
Figure 2. CS5351 Master Mode Clocking
MCLK (MHz)
MDIV = 0
11.2896
11.2896
11.2896
12.288
12.288
12.288
8.192
8.192
÷ 256
÷ 128
÷ 64
÷ 4
÷ 2
÷ 1
Double
Double
Single
Speed
Speed
Speed
Speed
Speed
Speed
Single
Quad
Quad
M1
00
01
10
00
01
10
MCLK (MHz)
MDIV = 1
22.5792
22.5792
22.5792
16.384
24.576
16.384
24.576
24.576
M0
LRCK Output
(Equal to Fs)
SCLK Output
CS5351
7

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