ADC08D1000EVAL National Semiconductor, ADC08D1000EVAL Datasheet - Page 25

• Manufacturer Part Number: ADC08D1000EVAL
• Description: High Performance/ Low Power/ Dual 8-Bit/ 1 GSPS A/D Converter
• Manufacturer: National Semiconductor

2.0 Applications Information
When the d.c. coupled mode is used, a common mode
voltage must be provided at the differential inputs. This
common mode voltage should track the V
Note that the V
perature. The common mode output of the driving device
should track this change.
Full-scale distortion performance falls off rapidly as the input
common mode voltage deviates from V
result of using a very low supply voltage to minimize power.
Keep the input common voltage within 50 mV of V
Performance is as good in the d.c. coupled mode as it is in
the a.c. coupled mode, provided the input common mode
voltage at both analog inputs remain within 50 mV of V
If d.c. coupling is used, it is best to servo the input common
mode voltage, using the V
performance. An example of this type of circuit is shown in
Figure 10.
One such circuit should be used in front of the V
another in front of the V
R
gained up by the amplifier, the input common mode voltage
is equal to V
allow the bypass capacitor to isolate the input signal from
V
essary. If there is no need to divide the input signal, R
needed. Capacitor "C" in Figure 10 should be chosen to
keep any component of the input signal from affecting V
Be sure that the current drawn from the V
not exceed 100 µA.
The Input impedance in the d.c. coupled mode (V
grounded) consists of a precision 100Ω resistor between
FIGURE 10. Example of Servoing the Analog Input with
(Continued)
CMO
D3
are used to divide the V
. R
IN
, R
FIGURE 9. Differential Input Drive
CMO
D2
CMO
and R
from the ADC. R
output potential will change with tem-
D3
IN
− input. In that figure, R
will divide the input signal, if nec-
V
CMO
CMO
CMO
potential so that, after being
pin, to maintain optimum
D1
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and R
CMO
CMO
. This is a direct
CMO
D2
IN
output does
D1
CMO
+ input and
are split to
output pin.
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, R
CMO
IN
D2
pin not
is not
.
CMO
CMO
and
.
.
25
V
to ground. In the a.c. coupled mode the input appears the
same except there is also a resistor of 50K between each
analog input pin and the V
Driving the inputs beyond full scale will result in a saturation
or clipping of the reconstructed output.
2.2.1 Handling Single-Ended Input Signals
There is no provision for the ADC08D1000 to adequately
process single-ended input signals. The best way to handle
single-ended signals is to convert them to differential signals
before presenting them to the ADC. The easiest way to
accomplish single-ended to differential signal conversion is
with an appropriate balun-connected transformer, as shown
in Figure 11.
2.2.2 Out Of Range (OR) Indication
When the conversion result is clipped the Out of Range
output is activated such that OR+ goes high and OR- goes
low. This output is active as long as accurate data on either
or both of the buses would be outside the range of 00h to
FFh.
2.2.3 Full-Scale Input Range
As with all A/D Converters, the input range is determined by
the value of the ADC’s reference voltage. The reference
voltage of the ADC08D1000 is derived from an internal
band-gap reference. The FSR pin controls the effective ref-
erence voltage of the ADC08D1000 such that the differential
full-scale input range at the analog inputs is 800 mV
the FSR pin high, or is 600 mV
SNR is obtained with FSR high, but better distortion and
SFDR are obtained with the FSR pin low.
2.3 THE CLOCK INPUTS
The ADC08D1000 has differential LVDS clock inputs, CLK+
and CLK-, which must be driven with an a.c. coupled, differ-
ential clock signal. Although the ADC08D1000 is tested and
its performance is guaranteed with a differential 1.0 GHz
clock, it typically will function well with input clock frequen-
cies indicated in the Electrical Characteristics Table. The
clock inputs are internally terminated and biased. The input
clock signal must be capacitively coupled to the clock pins as
indicated in Figure 12.
Operation up to the sample rates indicated in the Electrical
Characteristics Table is typically possible if the maximum
ambient temperatures indicated are not exceeded. Operat-
ing at higher sample rates than indicated for the given am-
bient temperature may result in reduced device reliability
and product lifetime. This is because of the higher power
consumption and die temperatures at high sample rates.
Important also for reliability is proper thermal management .
See Section 2.6.2.
IN
+ and V
conversion with a balun-connected transformer
FIGURE 11. Single-Ended to Differential signal
IN
− and a capacitance from each of these inputs
CMO
potential.
P-P
with FSR pin low. Best
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P-P
with