PCA9545 Philips Semiconductors, PCA9545 Datasheet - Page 7

no-image

PCA9545

Manufacturer Part Number
PCA9545
Description
4-channel I2C switch with interrupt logic and reset
Manufacturer
Philips Semiconductors
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCA9545A
Manufacturer:
PHI
Quantity:
20 000
Part Number:
PCA9545AD
Manufacturer:
NXP
Quantity:
20 000
Part Number:
PCA9545AD,118
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
PCA9545ADGVR
Manufacturer:
TI/德州仪器
Quantity:
20 000
Part Number:
PCA9545ADW
Manufacturer:
TI/德州仪器
Quantity:
20 000
Part Number:
PCA9545ADWR
Manufacturer:
NXP
Quantity:
59
Part Number:
PCA9545AGQNR
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
PCA9545APW
Manufacturer:
Philips
Quantity:
842
Part Number:
PCA9545APW
0
Company:
Part Number:
PCA9545APW
Quantity:
2 812
Part Number:
PCA9545APWR
Manufacturer:
Texas Instruments
Quantity:
1 791
Part Number:
PCA9545APWR
Manufacturer:
MICREL
Quantity:
3 100
Part Number:
PCA9545APWR
0
Company:
Part Number:
PCA9545APWR
Quantity:
20 000
Part Number:
PCA9545APWЈ¬112
Manufacturer:
NXP
Quantity:
2 113
Part Number:
PCA9545AZQNR
Manufacturer:
Texas Instruments
Quantity:
10 000
Philips Semiconductors
Acknowledge
The number of data bytes transferred between the start and the stop conditions from transmitter to receiver is not limited. Each byte of eight bits
is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter whereas the master generates an
extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an acknowledge after the reception of each byte. Also a master must generate an
acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges has to pull down
the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during the HIGH period of the acknowledge related clock
pulse, set-up and hold times must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of
the slave. In this event, the transmitter must leave the data line HIGH to enable the master to generate a stop condition.
Bus transactions
Data is transmitted to the PCA9545 control register using the write mode as shown in Figure 10.
Data is read from PCA9545 control register using the read mode as shown in Figure 11.
2002 Mar 28
4-channel I
BY TRANSMITTER
DATA OUTPUT
2
DATA OUTPUT
BY RECEIVER
C switch with interrupt logic and reset
SCL FROM
SDA
SDA
MASTER
start condition
start condition
S
S
START condition
1
1
S
1
1
SLAVE ADDRESS
1
SLAVE ADDRESS
1
Figure 9. Acknowledgement on the I
0
0
0
Figure 10. WRITE control register
0
Figure 11. READ control register
1
A1
A1
A0
A0
R/W
1
R/W
0
2
A
acknowledge
from slave
A
acknowledge
from slave
7
INT3
X
INT2
CONTROL REGISTER
not acknowledge
CONTROL REGISTER
X
INT1
acknowledge
X
INT0
8
X
2
B3
C-bus
B3
B2
no acknowledge
B2
from master
B1
acknowledge
from slave
B1
9
B0
B0
last byte
NA
A
P
stop condition
stop condition
P
clock pulse for
acknowledgement
SW00761
SW00760
PCA9545
853-2302 27311
Product data
SW00368

Related parts for PCA9545