SAA7391H Philips Semiconductors, SAA7391H Datasheet - Page 29

• Manufacturer Part Number: SAA7391H
• Description: ATAPI CD-R block encoder/decoder
• Manufacturer: Philips Semiconductors

Philips Semiconductors
7.3.4
Table 39 Description of the IECCTRL register control bits (notes 1 and 2)
Notes
1. In order for the IEC interface to operate correctly, it will require a clock at 128f
2. The ‘vbit’ is copied into the V bit of the IEC 958 frame.
Table 40 IEC 958 system channel bit mapping (note 1)
Note
1. The C bit is updated on an IEC frame-by-frame basis, the bit offset corresponds to the IEC frame offset. They are
1997 Aug 01
1 to 0
ATAPI CD-R block encoder/decoder
BIT NUMBER
BIT
repeated for both left and right channels. Bit 0 is present in the C bit of the first sample pair of the IEC superframe of
192 sample pairs.
7
6
5
4
3
2
16
24
IEC 958/EBU
0
8
copyright
NAME
preem
iecen
accu
data
vbit
OUTPUT
VALUE
cat0
+0
00
01
10
11
0
0
0
0
1
0
1
0
1
0
1
0
1
IEC 958 interface is off
IEC 958 Interface is on
IEC 958 contains audio information
IEC 958 contains data
IEC 958 C bit in system channel is logic 0
IEC 958 C bit in system channel is logic 1
audio pre-emphasis off/IEC 958 contains data
audio pre-emphasis on (only appears in IEC 958 C channel; de-emphasis bit is not
implemented in the SAA7391)
audio samples suitable for conversion
mute audio, or signal is data and should not be digital-to-analog converted at any
time
reserved
reserved
level II clock accuracy
level III clock accuracy (depends on mck/system clock)
reserved
reserved
data
cat1
+1
0
0
copyright
cat2
+2
0
0
29
preem
cat3
+3
0
0
BIT OFFSET
DESCRIPTION
accu0
cat4
+4
0
s
to be present.
accu1
cat5
+5
0
0
Objective specification
cat6
+6
0
0
0
SAA7391
cat7
+7
0
0
0