XCS05XL Xilinx, XCS05XL Datasheet - Page 58

• Manufacturer Part Number: XCS05XL
• Description: Spartan and Spartan-XL Families Field Programmable Gate Arrays
• Manufacturer: Xilinx

Spartan and Spartan-XL Families Field Programmable Gate Arrays
Spartan-XL Pin-to-Pin Output Parameter Guidelines
Testing of switching parameters is modeled after testing
methods specified by MIL-M-38510/605. All devices are
100% functionally tested. Pin-to-pin timing parameters are
derived from measuring external and internal test patterns
Spartan-XL Output Flip-Flop, Clock-to-Out
58
Notes:
1.
2.
3.
Global Clock to Output using OFF
Slew Rate Adjustment
Symbol
T
T
ICKOF
SLOW
Output delays are representative values where one global clock input drives one vertical clock line in each accessible column,and
where all accessible IOB and CLB flip-flops are clocked by the global clock net.
Output timing is measured at ~50% V
OFF = Output Flip Flop
Fast
For Output SLOW option add
Description
CC
threshold with 50 pF external capacitive load.
www.xilinx.com
1-800-255-7778
and are guaranteed over worst-case operating conditions
(supply voltage and junction temperature). Listed below are
representative values for typical pin locations and normal
clock loading.
All Devices
XCS05XL
XCS10XL
XCS20XL
XCS30XL
XCS40XL
Device
DS060 (v1.6) September 19, 2001
Max
4.6
4.9
5.2
5.5
5.8
1.5
-5
Speed Grade
Product Specification
Max
5.2
5.5
5.8
6.2
6.5
1.7
-4
Units
ns
ns
ns
ns
ns
ns
R