Z86E61 Zilog., Z86E61 Datasheet - Page 12

• Manufacturer Part Number: Z86E61
• Description: CMOS Z8 16K/32K EPROM MICROCONTROLLER
• Manufacturer: Zilog.

UART OPERATION
Port 3 lines, P37 and P30, are programmed as serial I/O
lines for full-duplex serial asynchronous receiver/trans-
mitter operation. The bit rate is controlled by Counter/
Timer0.
The Z86E61/E63 automatically adds a start bit and two
stop bits to transmitted data (Figure 10). Odd parity is also
available as an option. Eight data bits are always transmit-
Auto Latch. The Auto Latch puts valid CMOS levels on all
CMOS inputs that are not externally driven. This reduces
excessive supply current flow in the input buffer when it is
not driven by any source.
ADDRESS SPACE
Program Memory. The Z86E61/E63 can address 48
Kbytes (E61) or 32 Kbytes (E63) of external program
memory (Figure 11). The first 12 bytes of program memory
are reserved for the interrupt vectors. These locations
contain six 16-bit vectors that correspond to the six
available interrupts. For EPROM mode, byte 13 to byte
12
Transmitted Data (No Parity)
Transmitted Data (With Parity)
SP SP
SP SP
D7 D6 D5 D4 D3 D2 D1 D0
P
D6 D5 D4 D3 D2 D1 D0
ST
ST
Figure 10. Serial Data Formats
Start Bit
Seven Data Bits
Odd Parity
Two Stop Bits
Start Bit
Eight Data Bits
Two Stop Bits
P R E L I M I N A R Y
ted, regardless of parity selection. If parity is enabled, the
eighth bit is the odd parity bit. An interrupt request (IRQ4)
is generated on all transmitted characters.
Received data must have a start bit, eight data bits, and at
least one stop bit. If parity is on, bit 7 of the received data
is replaced by a parity error flag. Received characters
generate the IRQ3 interrupt request.
Note: P33-P30 inputs differ from the Z86C61/C63 in that
there is no clamping diode to V
high voltage detection circuits. Exceeding the V
mum specification during standard operating mode may
cause the device to enter EPROM mode
16383 (E61) or 32767 (E63) consists of on-chip EPROM. At
addresses 16384 (E61) or 32768 (E63) and above, the
Z86E61/E63 executes external program memory fetches.
In ROMless mode, the Z86E61/E63 can address up to 64
Kbytes of program memory. Program execution begins at
external location 000C (HEX) after a reset.
Received Data (No Parity)
Received Data (With Parity)
SP
SP
D7 D6 D5 D4 D3 D2 D1 D0
P
D6 D5 D4 D3 D2 D1 D0
CC
because of the EPROM
ST
ST
Start Bit
Seven Data Bits
Parity Error Flag
One Stop Bit
Start Bit
Eight Data Bits
One Stop Bit
WITH
Z86E61/E63 Z8
16K/32K EPROM
IH
maxi-
®
MCU