Z86E61 Zilog., Z86E61 Datasheet - Page 41

• Manufacturer Part Number: Z86E61
• Description: CMOS Z8 16K/32K EPROM MICROCONTROLLER
• Manufacturer: Zilog.

OPCODE MAP
A
B
C
D
E
0
1
2
3
4
5
6
7
8
9
F
10/12.1
DECW
SWAP
DEC
RLC
COM
PUSH
INCW
CLR
SRA
RRC
IRR1
10.5
POP
6.5
6.5
10.5
RR1
10.5
RR1
6.5
6.5
R1
R1
INC
8.5
DA
6.5
6.5
RL
R1
R1
6.5
RR
R1
R1
R1
R1
6.5
8.0
6.5
R1
JP
R1
R1
8.5
R2
R1
0
12/14.1
DECW
PUSH
INCW
CLR
SRA
SWAP
DEC
RLC
SRP
COM
POP
RRC
IR1
6.5
IR1
6.1
10.5
10.5
6.5
IR1
IR1
6.5
IR1
10.5
6.5
INC
IM
6.5
IR1
DA
IR1
IR1
IR2
IR1
IR1
IR1
IR1
RR
IR1
6.5
8.5
6.5
RL
6.5
6.5
8.5
IR1
Opcode
1
Nibble
Upper
Operand
Execution
2
Cycles
r1, Irr2
r2, Irr1
r1, Irr2
r1, Irr2
r1, r2
r1, r2
r1, r2
r1, r2
r1, r2
r1, r2
r1, r2
r1, r2
r1, r2
r1, r2
ADD
ADC
AND
TCM
XOR
SUB
SBC
12.0
LDE
12.0
LDE
LDC
First
12.0
LDC
12.0
OR
6.5
6.5
6.5
6.5
6.5
6.5
6.5
6.5
TM
6.5
CP
6.5
2
Ir1, Irr2
Ir1, Irr2
Ir1, Irr2
Ir2, Irr1
r1, IR2
r1, Ir2
r1, Ir2
r1, Ir2
r1, Ir2
r1, Ir2
r1, Ir2
r1, Ir2
r1, Ir2
r1, Ir2
r1, Ir2
Ir1, r2
LDCI
LDCI
A
ADD
ADC
AND
TCM
XOR
SUB
SBC
LDEI
LDEI
18.0
18.0
18.0
18.0
OR
TM
6.5
LD
6.5
6.5
6.5
6.5
6.5
6.5
6.5
6.5
6.5
CP
6.5
6.5
LD
3
Opcode
R1, R2
Nibble
Lower
10.5
CP
4
R2, R1
R2, R1
R2, R1
R2, R1
R2, R1
R2, R1
R2, R1
R2, R1
R2, R1
R2, R1
CALL*
R2, R1
XOR
ADD
ADC
SUB
SBC
AND
TCM
IRR1
10.5
10.5
10.5
10.5
10.5
10.5
10.5
10.5
10.5
10.5
20.0
10.5
OR
TM
CP
LD
4
IR2, R1
IR2, R1
IR2, R1
IR2, R1
IR2, R1
IR2, R1
R2, IR1
IR2, R1
IR2, R1
IR2, R1
IR2, R1
IR2, R1
AND
TCM
ADD
ADC
SUB
SBC
10.5
10.5
10.5
10.5
10.5
10.5
10.5
10.5
10.5
10.5
XOR
10.5
10.5
OR
TM
CP
LD
LD
Pipeline
Cycles
5
Second
Operand
P R E L I M I N A R Y
Mnemonic
3
R1, IM
R1, IM
R1, IM
R1, IM
R1, IM
R1, IM
R1, IM
R1, IM
R1, IM
R1, IM
CALL
R1, IM
AND
TCM
ADD
ADC
SUB
SBC
XOR
20.0
10.5
10.5
10.5
10.5
10.5
10.5
10.5
10.5
10.5
10.5
10.5
OR
TM
DA
CP
LD
6
Bytes per Instruction
Lower Nibble (Hex)
IR1, IM
IR1, IM
r1,x,R2
r2,x,R1
IR1, IM
IR1, IM
IR1, IM
IR1, IM
IR1, IM
IR1, IM
IR1, IM
IR1, IM
IR1, IM
XOR
ADD
ADC
SUB
SBC
AND
TCM
10.5
10.5
10.5
10.5
10.5
10.5
10.5
10.5
10.5
10.5
10.5
10.5
10.5
CP
LD
OR
TM
LD
LD
7
r1, R2
6.5
LD
8
r2, R1
6.5
LD
9
12/10.5
Legend:
R = 8-bit Address
r = 4-bit Address
R1 or r1 = Dst Address
R2 or r2 = Src Address
Sequence:
Opcode, First Operand,
Second Operand
Note: Blank areas not defined.
*2-byte instruction appears as
r1, RA
DJNZ
a 3-byte instruction
A
2
12/10.0
cc, RA
JR
B
r1, IM
6.5
LD
C
12.10.0
cc, DA
JP
D
3
WITH
Z86E61/E63 Z8
INC
6.5
E
r1
16K/32K EPROM
1
STOP
HALT
IRET
RCF
CCF
16.0
NOP
RET
6.5
SCF
6.5
6.0
14.0
6.1
6.1
7.0
DI
EI
6.5
6.0
F
®
MCU
41