MC68HLC705KJ1 Freescale Semiconductor, MC68HLC705KJ1 Datasheet
MC68HLC705KJ1
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MC68HLC705KJ1 Summary of contents
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... MC68HC705KJ1 MC68HRC705KJ1 MC68HLC705KJ1 Data Sheet M68HC05 Microcontrollers MC68HC705KJ1 Rev. 4.1 07/2005 freescale.com ...
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...
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... Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://freescale.com Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. © Freescale Semiconductor, Inc., 2005. All rights reserved. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor 3 ...
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... Reformatted to new publications standards. May, 2003 4.0 Figure A-2. Typical Internal Operating Frequency for Various VDD at 25°C — RC Oscillator Option Only — replaced graph July, 2005 4.1 Updated to meet Freescale identity guidelines. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 4 Description Page Number( ...
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... Chapter 5 External Interrupt Module (IRQ Chapter 6 Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 Chapter 7 Parallel I/O Ports (PORTS Chapter 8 Resets and Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Chapter 9 Multifunction Timer Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 Chapter 10 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 Chapter 11 Ordering Information and Mechanical Specifications . . . . . . . . . . . . . . . . . . . 97 Appendix A MC68HRC705KJ1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 Appendix B MC68HLC705KJ1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor 5 ...
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... List of Chapters MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 6 Freescale Semiconductor ...
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... EPROM Erasing 2.8 Mask Option Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 2.9 EPROM Programming Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Computer Operating Properly Module (COP) 3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.2 Features 3.3 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.3.1 COP Watchdog Timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.3.2 COP Watchdog Timeout Period 3.3.3 Clearing the COP Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor Chapter 1 Introduction Chapter 2 Memory Chapter 3 7 ...
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... Control Instructions 4.6.3 Instruction Set Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 4.7 Opcode Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 5.2 Features 5.3 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 5.3.1 IRQ/V Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 PP 5.3.2 Optional External Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 5.4 IRQ Status and Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 5.5 Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 8 Chapter 4 Central Processor Unit (CPU) Chapter 5 External Interrupt Module (IRQ) Freescale Semiconductor ...
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... Data Direction Register 7.3.3 Pulldown Register 7.4 I/O Port Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 8.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 8.2 Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 8.2.1 Power-On Reset 8.2.2 External Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 8.2.3 COP Watchdog Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 8.2.4 Illegal Address Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor Chapter 6 Low-Power Modes Chapter 7 Parallel I/O Ports (PORTS) Chapter 8 Resets and Interrupts 9 ...
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... Ordering Information and Mechanical Specifications 11.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 11.2 MCU Order Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 11.3 16-Pin PDIP — Case #648 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 11.4 16-Pin SOIC — Case #751G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 11.5 16-Pin Cerdip — Case #620A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 10 Chapter 9 Multifunction Timer Module Chapter 10 Electrical Specifications Chapter 11 Freescale Semiconductor ...
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... RC Oscillator Connections (No External Resistor 103 A.5 Typical Internal Operating Frequency Versus Temperature (No External Resistor 104 A.6 Package Types and Order Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 B.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 B.2 DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 B.3 Package Types and Order Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor Appendix A MC68HRC705KJ1 Appendix B MC68HLC705KJ1 11 ...
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... Table of Contents MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 12 Freescale Semiconductor ...
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... Internal steering diode and pullup resistor from RESET pin to V • Selectable EPROM security • Selectable oscillator bias resistor 1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or copying the EPROM/OTPROM difficult for unauthorized users. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor ( ...
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... Introduction 1.2 Structure OSC1 INTERNAL OSCILLATOR OSC2 RESET IRQ/V PP MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 14 15-STAGE DIVIDE MULTIFUNCTION BY ³2 TIMER SYSTEM WATCHDOG AND ILLEGAL ADDRESS DETECT CPU CONTROL ALU 68HC05 CPU ACCUMULATOR CPU REGISTERS INDEX REGISTER STK PTR ...
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... STOP instruction mode Crystal oscillator internal resistor EPROM security Short oscillator delay counter 1.4 Pin Functions Pin assignments are shown in MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor Table 1-1. Programmable Options Enabled or disabled Edge-sensitive only or edge- and level-sensitive Enabled or disabled ...
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... MΩ is provided between OSC1 and OSC2 for the crystal oscillator as a programmable mask option. Use an AT-cut crystal and not an AT-strip crystal because the MCU can overdrive an AT-strip crystal. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4 ...
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... Mount the resonator and components as close as possible to the pins for startup stabilization and to minimize output distortion. An internal startup resistor of approximately 2 MΩ is provided between OSC1 and OSC2 as a programmable mask option. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor V ...
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... Figure 1-6. Ceramic Resonator Connections with Oscillator Internal Resistor Mask Option MCU 10 MΩ CERAMIC RESONATOR Figure 1-7. Ceramic Resonator Connections without Oscillator Internal Resistor Mask Option 1.4.2.3 RC Oscillator Refer to Appendix A MC68HRC705KJ1. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4 ...
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... These eight input/output (I/O) lines comprise port A, a general-purpose bidirectional I/O port. (See Chapter 5 External Interrupt Module (IRQ) 1.4.6 PB2 and PB3 These two I/O lines comprise port B, a general-purpose bidirectional I/O port. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor Figure 1-8. This configuration is possible regardless of whether ...
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... Introduction MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 20 Freescale Semiconductor ...
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... Accessing a reserved location can have unpredictable effects on MCU operation. In register figures in this document, reserved locations are marked with the word Reserved or with the letter R. 2.4 Memory Map See Figure 2-1. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor (Figure 2-2) Figure 2-2 Figure 2-2 and in ...
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... REGISTERS AND EPROM ↓ 16 BYTES $07FF Note 1. Writing to bit 0 of $07F0 clears the COP watchdog. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 22 PORT A DATA REGISTER (PORTA) PORT B DATA REGISTER (PORTB) DATA DIRECTION REGISTER A (DDRA) DATA DIRECTION REGISTER B (DDRB) TIMER STATUS AND CONTROL REGISTER (TSCR) ...
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... Write: See page 82. Reset: Read: IRQ Status and Control Reg- $000A ister (ISCR) Write: See page 54. Reset: Figure 2-2. I/O Register Summary (Sheet MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor Bit PA7 PA6 PA5 PA4 Unaffected by reset ...
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... Reserved Read: COP Register (COPR) $07F0 Write: See page 30. Reset: Read: Mask Option Register (MOR) $07F1 Write: See page 27. Reset: Figure 2-2. I/O Register Summary (Sheet MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 24 Bit PDIA7 PDIA6 PDIA5 PDIA4 ...
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... Manipulating the control bits in the EPROM programming register to program the EPROM/OTPROM on a byte-by-byte basis • Programming the EPROM/OTPROM with the M68HC705J In-Circuit Simulator (M68HC705JICS) available from Freescale MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor NOTE NOTE RAM ...
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... EPROM Erasing The erased state of an EPROM bit is logic 0. Erase the EPROM by exposing Ws/cm light with a wavelength of 2537 angstroms. Position the ultraviolet light source one inch from the EPROM. Do not use a shortwave filter. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4 ...
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... The OSCRES bit enables a 2-MΩ internal resistor in the oscillator circuit Oscillator internal resistor enabled 0 = Oscillator internal resistor disabled Program the OSCRES bit to logic 0 in devices using low-speed crystal or RC oscillators with external resistor. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor , to the IRQ/V pin ...
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... Characteristic Programming Voltage IRQ/V PP Programming Current IRQ/V PP Programming Time Per Array Byte MOR = 5.0 Vdc ± 10 Vdc MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 28 occurs after exiting halt mode. cyc Symbol EPGM t MPGM ° ° = –40 ...
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... The minimum COP timeout period is seven times the RTI period. The COP is cleared asynchronously with the value in the RTI divider; hence, the COP timeout period will vary between 7x and 8x the RTI period. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor . Periodically clearing the counter starts a new timeout period and ...
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... The STOP instruction clears the COP watchdog counter and disables the clock to the COP watchdog. To prevent the STOP instruction from disabling the COP watchdog, program the stop-to-wait conversion bit (SWAIT) in the mask option register to logic 1. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 30 NOTE 6 ...
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... COP timeout period. 3.6.2 Wait Mode The WAIT instruction has no effect on the COP watchdog. To prevent a COP timeout during wait mode, exit wait mode periodically to service the COP. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor NOTE NOTE Low-Power Modes ...
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... Computer Operating Properly Module (COP) MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 32 Freescale Semiconductor ...
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... The arithmetic/logic unit (ALU) performs the arithmetic, logic, and manipulation operations decoded from the instruction set by the CPU control unit. The ALU produces the results called for by the program and sets or clears status and control bits in the condition code register (CCR). MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor Figure 4-1 ...
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... Central Processor Unit (CPU) CPU CONTROL UNIT CARRY/BORROW FLAG MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4 ...
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... Bit Read Write: Reset Unimplemented MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor Unaffected by reset Figure 4-2. Accumulator ( Unaffected by reset Figure 4-3. Index Register (X) 12 ...
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... After any reset, the interrupt mask is set and can be cleared only by a software instruction. N — Negative Flag The CPU sets the negative flag when an ALU operation produces a negative result. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4 ...
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... Extended instructions use three bytes and can access any address in memory. The first byte is the opcode; the second and third bytes are the high and low bytes of the operand address. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor Instruction Set ...
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... When using the Freescale assembler, the programmer does not need to calculate the offset because the assembler determines the proper offset and verifies that it is within the span of the branch. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 38 Freescale Semiconductor ...
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... Multiply OR Accumulator with Memory Byte Subtract Memory Byte and Carry Bit from Accumulator Store Accumulator in Memory Store Index Register in Memory Subtract Memory Byte from Accumulator MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor Instruction Instruction Set Mnemonic ADC ADD ...
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... The bit to be tested and its condition (set or clear) is part of the opcode. The span of branching is from –128 to +127 from the address of the next location after the MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 40 ...
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... Branch if Interrupt Mask Set Branch if Not Equal Branch if Plus Branch Always Branch if Bit Clear Branch Never Branch if Bit Set Branch to Subroutine Unconditional Jump Jump to Subroutine MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor NOTE Instruction Mnemonic Instruction Set BCC BCS BEQ BHCC ...
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... Set Interrupt Mask Stop Oscillator and Enable IRQ Pin Software Interrupt Transfer Accumulator to Index Register Transfer Index Register to Accumulator Stop CPU Clock and Enable Interrupts MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 42 Table 4-4. Bit Manipulation Instructions Instruction NOTE Table 4-5. Control Instructions ...
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... BHI rel Branch if Higher BHS rel Branch if Higher or Same BIH rel Branch if IRQ Pin High BIL rel Branch if IRQ Pin Low MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor Effect on CCR Description ← (A) + (M) + (C) — A ← (A) + (M) — ...
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... BRSET n opr rel Branch if Bit n Set BSET n opr Set Bit n BSR rel Branch to Subroutine CLC Clear Carry Bit CLI Clear Interrupt Mask MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 44 Effect on CCR Description (A) ∧ (M) — — PC ← (PC rel ? — ...
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... Unconditional Jump JMP opr,X JMP ,X JSR opr JSR opr JSR opr,X Jump to Subroutine JSR opr,X JSR ,X MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor Effect on CCR Description ← $00 A ← $00 X ← $00 — — — ...
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... Rotate Byte Left through Carry Bit ROL opr,X ROL ,X ROR opr RORA RORX Rotate Byte Right through Carry Bit ROR opr,X ROR ,X RSP Reset Stack Pointer MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 46 Effect on CCR Description ← (M) — — X ← (M) — — — ...
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... TAX Transfer Accumulator to Index Register TST opr TSTA TSTX Test Memory Byte for Negative or Zero TST opr,X TST ,X MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor Effect on CCR Description ← (SP Pull (CCR) SP ← (SP Pull (A) SP ← ...
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... Indexed, 16-bit offset addressing mode M Memory location N Negative flag n Any bit 4.7 Opcode Map See Table 4-7. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 48 Effect on CCR Description ← (X) — — — — — — 0 — — — opr Operand (one or two bytes) ...
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Bit Manipulation Branch Read-Modify-Write DIR DIR REL DIR INH MSB LSB BRSET0 BSET0 BRA NEG NEGA 3 DIR 2 DIR 2 REL 2 DIR BRCLR0 ...
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... Central Processor Unit (CPU) MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 50 Freescale Semiconductor ...
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... PP If level-sensitive triggering is selected, the IRQ/V operation. If the IRQ/V pin is not used, it must be tied to the V PP MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor ) PP ) and port A pins 0–3 (PA0–PA3) provide PP pin latches an external interrupt request. The LEVEL bit in the mask ...
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... The PA0–PA3 pins are selected as a group to function as IRQ interrupts and are enabled by the IRQE bit in the IRQ status and control register. The PA0–PA3 pins can be positive-edge triggered only or positive-edge and high-level triggered. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 52 LEVEL-SENSITIVE TRIGGER ...
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... FROM RESET YES I BIT SET? EXTERNAL INTERRUPT? INTERRUPT? FETCH NEXT INSTRUCTION. INSTRUCTION? INSTRUCTION? MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor NO YES CLEAR IRQ LATCH. NO TIMER YES STACK PCL, PCH CCR. NO SET I BIT. LOAD PC WITH INTERRUPT VECTOR. SWI ...
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... No external interrupt request pending IRQE — External Interrupt Request Enable Bit This read/write bit enables external interrupts. Reset sets the IRQE bit External interrupt requests enabled 0 = External interrupt requests disabled MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 54 NOTE ...
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... OP OP OSC 3. The minimum t should not be less than the number of interrupt service routine cycles plus 19 t ILIL MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor t ILIL t ILIH t ILIH Figure 5-5. External Interrupt Timing Symbol = –40° 85°C, unless otherwise noted. ...
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... External Interrupt Module (IRQ) MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 56 Freescale Semiconductor ...
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... Timer interrupt — Real-time interrupt requests and timer overflow interrupt requests start the MCU clock and load the program counter with the contents of locations $07F8 and $07F9. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor pin or a low-to-high transition on an ...
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... After exit from wait mode by interrupt, the I bit remains clear. After exit from wait mode by reset, the I bit is set. 6.3.3 COP Watchdog Effects of STOP and WAIT on the COP watchdog are discussed here. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 58 NOTE Freescale Semiconductor ...
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... After exiting stop mode by reset and after the oscillator stabilization delay, the timer resumes operation from its reset state. 6.3.4.2 WAIT The WAIT instruction has no effect on the timer. 6.3.5 EPROM/OTPROM Effects of STOP and WAIT on the EPROM/OTPROM are discussed here. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor Effects of Stop and Wait Modes NOTE NOTE NOTE ...
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... Internal clocking from OSC1 pin 2. Edge-triggered external interrupt mask option 3. Edge- and level-triggered external interrupt mask option 4. Reset vector shown as example 5. 4064 cycles or 128 cycles, depending on state of SOSCD bit in MOR MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 60 OSCILLATOR STABILIZATION DELAY $07FE $07FE ...
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... YES EXTERNAL INTERRUPT? NO TURN ON INTERNAL OSCILLATOR. RESET STABILIZATION TIMER. END OF STABILIZATION DELAY? NO MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor YES HALT CLEAR I BIT IN CCR. SET IRQE BIT IN ISCR. TURN OFF CPU CLOCK. TIMER CLOCK ACTIVE. YES EXTERNAL RESET? ...
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... Low-Power Modes MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 62 Freescale Semiconductor ...
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... PB5, PB4, PB1, and PB0 should be configured as inputs at all times. These bits are available for read/write but are not available externally. Configuring them as inputs will ensure that the pulldown devices are enabled, thus properly termi- nating them. Figure 7-1. Parallel I/O Port Register Summary MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor NOTE Bit 7 ...
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... Corresponding port A pin configured as output 0 = Corresponding port A pin configured as input Avoid glitches on port A pins by writing to the port A data register before changing data direction register A bits from Figure 7-4 shows the I/O logic of port A. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4 ...
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... Unimplemented PDIA[7:0] — Pulldown Inhibit A Bits PDIA[7:0] disable the port A pulldown devices. Reset clears PDIA[7:0 Corresponding port A pulldown device disabled 0 = Corresponding port A pulldown device not disabled MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor DDRAx PAx PDRAx RESET Figure 7-4. Port A I/O Circuitry Table 7-1 summarizes the operation of the port A pins ...
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... PB4–PB5 and PB0–PB1 should be configured as inputs at all times. These bits are available for read/write but are not available externally. Configuring them as inputs will ensure that the pulldown devices are enabled, thus properly terminating them. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 66 (IRQ).) 6 ...
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... When bit DDRBx is a logic 1, reading address $0001 reads the PBx data latch. When bit DDRBx is a logic 0, reading address $0001 reads the voltage level on the pin. The data latch can always be written, regardless of the state of its data direction bit. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor 6 ...
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... PDIB[3:2] — Pulldown Inhibit B Bits PDIB[3:2] disable the port B pulldown devices. Reset clears PDIB[3:2 Corresponding port B pulldown device disabled 0 = Corresponding port B pulldown device not disabled MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 68 Table 7-2. Port B Pin Operation I/O Pin Mode Input, high-impedance ...
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... Activated) Input Pulldown Current PA0–PA7, PB2–PB3 (With Individual Pulldown Activated) = 3.3 Vdc ± 10 Vdc Typical values reflect average measurements at midpoint of voltage range, 25°C. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor Symbol ...
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... Parallel I/O Ports (PORTS) MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 70 Freescale Semiconductor ...
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... Power-on reset (POR) circuit • RESET pin • Computer operating properly (COP) watchdog • Illegal address V DD RESET PIN MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor ILLEGAL ADDRESS COP WATCHDOG POWER-ON RESET INTERNAL CLOCK Figure 8-1. Reset Sources TO CPU AND RST S ...
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... Internal clock, internal address bus, and internal data bus are not available externally. 2. The next rising edge of the internal clock after the rising edge of RESET initiates the reset sequence. Characteristic RESET Pulse Width MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 72 pin generates a power-on reset. NOTE ...
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... An external interrupt request, shown in Figure 8-5, is latched as long as any source is holding an external interrupt pin low. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor pin latches an external interrupt request. When the CPU completes its PP ...
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... Interrupt Pulse Period = 3.3 Vdc ±10 Vdc The minimum t should not be less than the number of interrupt service routine cycles plus 19 t ILIL MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 74 LEVEL-SENSITIVE TRIGGER (MOR LEVEL BIT IRQ D Q LATCH ...
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... The return-from-interrupt (RTI) instruction causes the CPU to recover the CPU registers from the stack as shown in Figure 8-6. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor Interrupts Figure 8-6 75 ...
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... User Code (SWI) IRQ/V External Interrupt PP RTIF Bit Timer Interrupts TOF Bit 1. The COP watchdog is programmable in the mask option register. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 76 • • • CONDITION CODE REGISTER ACCUMULATOR INDEX REGISTER PROGRAM COUNTER (HIGH BYTE) PROGRAM COUNTER (LOW BYTE) • ...
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... FROM RESET YES I BIT SET? EXTERNAL INTERRUPT? INTERRUPT? FETCH NEXT INSTRUCTION. INSTRUCTION? INSTRUCTION? MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor NO YES CLEAR IRQ LATCH. NO TIMER YES STACK PC CCR. NO SET I BIT. LOAD PC WITH INTERRUPT VECTOR. SWI YES NO RTI YES UNSTACK CCR ...
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... Resets and Interrupts MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 78 Freescale Semiconductor ...
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... Chapter 3 Computer Operating Properly Module Addr. Register Name Timer Status and Control Register $0008 (TSCR) See page 81. Reset: Timer Counter Register (TCR) $0009 See page 82. Reset: MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor (COP). Bit Read: TOF RTIF TOIE Write ...
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... The timer overflow interrupt enable bit, TOIE, enables TOF interrupt requests. • Real-time interrupt flag (RTIF) — The RTIF bit is set when the selected RTI output becomes active. The real-time interrupt enable bit, RTIE, enables RTIF interrupt requests. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 80 TIMER COUNTER REGISTER BITS [0:7] OF 15-STAGE ...
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... Writing a logic 1 to this write-only bit clears the TOF bit. TOFR always reads as logic 0. Reset clears TOFR. RTIFR — Real-Time Interrupt Flag Reset Bit Writing a logic 1 to this write-only bit clears the RTIF bit. RTIFR always reads as logic 0. Reset clears RTIFR. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor ...
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... SOSCD bit in the mask option register is set), the power-on reset circuit is released, clearing the counter again and allowing the MCU to come out of reset. A timer overflow function at the eighth counter stage allows a timer interrupt every 1024 internal clock cycles. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 82 NOTE RTI Period ...
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... Wait Mode The timer remains active after a WAIT instruction. Any enabled timer interrupt request can bring the MCU out of wait mode. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor Low-Power Modes 83 ...
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... Multifunction Timer Module MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 84 Freescale Semiconductor ...
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... Thermal Resistance (1) MC68HC705KJ1P (2) MC68HC705KJ1DW (3) MC68HC705KJ1S plastic dual in-line package (PDIP small outline integrated circuit (SOIC ceramic DIP (Cerdip) MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor NOTE 10.5 5.0-V DC Electrical 10.6 3.3-V DC Electrical Characteristics Table 10-1. Maximum Ratings Symbol , Symbol ...
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... constant pertaining to the particular part. K can be determined from equation (3) by measuring P (at equilibrium) for a known T D obtained by solving equations (1) and (2) iteratively for any value of T MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4 °C can be obtained from × ...
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... Only input high current rated to +1 µA on RESET. 7. The R value selected for RC oscillator versions of this device is unspecified. OSC 8. Maximum current drain for all I/O pins combined should not exceed 100 mA. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor (1) Symbol V OH ...
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... Stop mode I is measured with OSC1 = – 0 Only input high current rated to +1 µA on RESET. 7. The R value selected for RC oscillator versions of this device is unspecified. OSC MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 88 (1) Symbol ...
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... V, devices are specified and tested for ( 3.3 V, devices are specified and tested for (V DD Figure 10-2. PA0–PA3 and PB2–PB3 Typical High-Side Driver Characteristics MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor 800 25°C 700 600 –40°C ...
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... 5.0 V, devices are specified and tested for 3.3 V, devices are specified and tested for V DD Figure 10-4. PA0–PA3 and PB2–PB3 Typical Low-Side Driver Characteristics MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 90 25°C –40° 5 ...
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... MHz INTERNAL OPERATING FREQUENCY (f Figure 10-6. Typical Wait Mode I MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor SEE NOTE 1 5.5 V 4.5 V 3.6 V 3.0 V 2.0 MHz 3.0 MHz 4.0 MHz ) OP SEE NOTE 1 SEE NOTE 2 5 ...
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... OSC1 pulse width = 5.0 Vdc ± 10 Vdc The maximum width ILIL ILIH routine plus the interrupt service routine will be re-entered. cyc MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 92 (1) Symbol EPGM t MPGM ° ° ...
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... IRQ PIN t IRQ IRQ n IRQ (INTERNAL) MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor DD ° ° – unless otherwise noted +85 C, should not be more than the number of cycles it takes to execute the interrupt service t ...
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... Power-on reset threshold is typically between 1 V and Internal clock, internal address bus, and internal data bus are not available externally. 3. 4064 t or 128 t depending on the state of SOSCD bit in MOR cyc cyc MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 94 OSCILLATOR STABILIZATION DELAY 07FE 07FE 07FE (NOTE 4) ...
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... NOTES: 1. Internal clock, internal address bus, and internal data bus are not available externally. 2. The next rising edge of the internal clock after the rising edge of RESET initiates the reset sequence. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor 07FE ...
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... Electrical Specifications MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 96 Freescale Semiconductor ...
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... Appendix A MC68HRC705KJ1 information on optional low-speed and resistor-capacitor oscillator devices extended temperature range small outline integrated circuit (SOIC ceramic dual in-line package (Cerdip) MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor are available in these packages: (1) Table 11-1. Order Numbers ...
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... 0.25 (0.010) 11.4 16-Pin SOIC — Case #751G - 16X M 0.010 (0.25 14X MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4 SEATING –T– PLANE STYLE 1: STYLE 2: PIN 1. CATHODE PIN 1. COMMON DRAIN 9 -B- P ...
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... Cerdip — Case #620A 0.25 (0.010) MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor 16X 0.25 (0.010 SEATING T PLANE D 16X 16-Pin Cerdip — Case #620A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14 ...
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... Ordering Information and Mechanical Specifications MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 100 Freescale Semiconductor ...
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... MCU The optional internal resistor is not recommended for configurations that use the RC oscillator connections as shown in configurations, the oscillator internal resistor (OSCRES) bit of the mask option register should be programmed to a logic 0. MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor Figure A-1 ...
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... Figure A-2. Typical Internal Operating Frequency for Various V MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 102 NOTE 10 100 RESISTANCE (k Ω 25°C — RC Oscillator Option Only DD 5 ...
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... MC68HC705KJ1 and the MC68HRC705KJ1 devices. MCU (EXTERNAL CONNECTIONS LEFT OPEN) Figure A-3. RC Oscillator Connections (No External Resistor) MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 Freescale Semiconductor RC Oscillator Connections (No External Resistor) Figure A-4. The internal resistance for this device is different than the ...
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... Chapter 11 Ordering Information and Mechanical Specifications ordering information extended temperature range plastic dual in-line package (PDIP small outline integrated circuit (SOIC ceramic dual in-line package (Cerdip) MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 104 50 Temperature (°C) versus Temperature (OSCRES Bit = 1) NOTE ...
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... Appendix B MC68HLC705KJ1 B.1 Introduction This appendix introduces the MC68HLC705KJ1, a low-frequency version of the MC68HC705KJ1 optimized for 32-kHz oscillators. All of the information in MC68HC705KJ1 Technical Data applies to the MC68HLC705KJ1 with the exceptions given in this appendix. B.2 DC Electrical Characteristics Table B-1. DC Electrical Characteristics (V Characteristic Supply Current (f = 16.0 kHz ...
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... Refer to Chapter 11 Ordering Information and Mechanical Specifications ordering information extended temperature range small outline integrated circuit (SOIC ceramic dual in-line package (Cerdip) MC68HC705KJ1 • MC68HRC705KJ1 • MC68HLC705KJ1 Data Sheet, Rev. 4.1 106 Pin Operating Count Temperature 16 –40 to +85°C ...
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...
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... Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer ...