KM684000C Samsung, KM684000C Datasheet - Page 5

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KM684000C

Manufacturer Part Number
KM684000C
Description
512Kx8 bit Low Power CMOS Static RAM
Manufacturer
Samsung
Datasheet

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AC CHARACTERISTICS
DATA RETENTION CHARACTERISTICS
KM684000C Family
AC OPERATING CONDITIONS
TEST CONDITIONS
Read
Write
Vcc for data retention
Data retention current
Data retention set-up time
Recovery time
Input pulse level : 0.8 to 2.4V
Input and output reference voltage : 1.5V
Output load (See right) :C
Input rising and falling time : 5ns
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Chip select to low-Z output
Output enable to low-Z output
Chip disable to high-Z output
Output disable to high-Z output
Output hold from address change
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
Item
Parameter List
(Test Load and Test Input/Output Reference)
C
L
L
=50pF+1TTL
=100pF+1TTL
Symbol
(Vcc=4.5~5.5V, KM684000C Family:T
V
t
t
I
RDR
SDR
DR
DR
CS Vcc-0.2V
Vcc=3.0V, CS Vcc-0.2V
See data retention waveform
Test Condition
5
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
WHZ
t
t
t
OHZ
t
t
OLZ
WC
CW
AW
WP
WR
DW
OW
CO
OE
OH
RC
AA
HZ
AS
DH
LZ
KM684000CL
KM684000CL-L
KM684000CLI
KM684000CLI-L
A
=0 to 70 C, KM684000CI Family:T
Min
1. Including scope and jig capacitance
55
10
10
55
45
45
40
25
5
0
0
0
0
0
0
5
-
-
-
C
L
55ns
1)
Max
55
55
25
20
20
20
Speed Bins
Min
-
-
-
-
-
-
-
-
-
-
-
-
-
2.0
0
5
-
-
-
-
Min
70
10
10
70
60
60
50
30
5
0
0
0
0
0
0
5
-
-
-
Typ
CMOS SRAM
-
-
-
-
-
-
-
70ns
A
=-40 to 85 C)
Max
70
70
35
25
25
25
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
5.5
40
15
50
20
-
-
Revision 1.0
April 1999
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
ms
V
A

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