LTC4110EUHF LINER [Linear Technology], LTC4110EUHF Datasheet - Page 43

• Manufacturer Part Number: LTC4110EUHF
• Description: Battery Backup System Manager
• Manufacturer: LINER [Linear Technology]

APPLICATIONS INFORMATION
The V
these values.
The MOSFET current ratings for the primary side must be
higher than I
and Calibration mode respectively. See Equations 1 and 2.
MOSFET current ratings for the secondary side must be
higher than I
both roles, the minimum current rating of the MOSFETs
should be greater than the higher of these values.
MOSFET power dissipation is a function of the RMS cur-
rent fl owing through the MOSFET.
Charge Mode:
Calibration Mode:
Where I
I
Using the equation below, plug in the higher current from
above into I
the given mode.
The R
vatively you can use the R
4.5V. If you are using a dual-MOSFET package, determine
whether charge mode or calibration mode results is the
highest overall power dissipation and use that as the rating
for the dual MOSFET.
PRI(FETCAL)
P
I
I
I
I
I
I
PRI FETCHG
SEC FETCHG
PRI FETCAL
SEC FETCAL
CAL
CHG
FET
E
DS(ON)
DS
(
(
(
(
= I
• •
PRI(FETCHG)
•
ratings of the MOSFETs need to be higher than
E
FET
is the same FET as I
FET
value of the MOSFET depends on V
V
PRI
PRI
2
BAT
)
)
)
V
• R
)
, which is I
=
to fi nd each FET’s power dissipation for
=
/N. Since both MOSFETs must perform
=
BAT
=
I
•
DS(ON)
CAL
I
CHG
(
is the same FET as I
V
•
BAT
V
(
•
DCIN
V
•
V
BAT
DS(ON)
DCI
PRI(CHG)
+ •
V
V
BAT
N V
+ •
BAT
N N
N V
N V
N V
SEC(FETCHG)
value with a V
+ •
•
DCIN
+ •
•
N V
or I
N V
DCIN
DCIN
DCIN
)
PRI(CAL)
DCIN
DCIN
)
SEC(FETCAL)
.
GS
GS
for charge
. Conser-
rating of
and
The MOSFET should be specifi ed for fast or PWM switching.
The MOSFET that meets all the above specifi cations but
has the lowest Q
PowerPath MOSFET SELECTION
Important parameters for the selection of PowerPath
MOSFETS are the maximum drain-source voltage V
threshold voltage V
Q
The maximum allowable drain-source voltage, V
must be high enough to withstand the maximum drain-
source voltage seen in the application.
The gates of these MOSFETs are driven by the INID (Input
Ideal Diode) and BATID (Battery Ideal Diode) pins. The
gate turn-on voltage, V
PowerPath supply voltage or the internal clamping volt-
age V
PowerPath supply voltage is the higher of the DCIN pin
or DCOUT pin voltage. For the MOSFETs driven from the
BATID pin, their PowerPath supply voltage is the higher
of the DCOUT pin or BAT pin voltage. Logic-level V
MOSFET is commonly used, but if a low supply voltage
limits the gate voltage a sub-logic-level threshold MOSFET
should be considered.
As a general rule, select a MOSFET with a low enough
R
current load and an achievable V
operates in the linear region and acts like a voltage con-
trolled resistor. If the MOSFET is grossly undersized then it
can enter the saturation region and a large V
However, the drain-source diode of the MOSFET, if forward
biased will limit V
current could result in excessively high MOSFET power
dissipation. Keep in mind that the LTC4110 will regulate
the forward voltage drop across the MOSFETs at 20mV
(V
be calculated by dividing 0.02V by the load current in amps.
Achieving forward regulation will minimize power loss and
heat dissipation, but it is not a necessity. If a forward volt-
age drop of more than 20mV is acceptable then a smaller
MOSFET can be used, but must be sized compatible with the
higher power dissipation. Care should be taken to ensure
GATE
DS(ON)
FR
) if R
GON
.
to obtain the desired V
DS(ON)
. For the MOSFET driven from the INID pin its
is low enough. The required R
G
DS
and/or Q
. A large V
GS(VT)
GS
, is set by the smaller of the
, on-resistance R
GD
DS
is often the best choice.
GS
DS
combined with the load
. The MOSFET normally
while operating at full
LTC4110
DS
DS(ON)
may result.
DS(ON)
DS(MAX)
DS(MAX)
43
GS(VT)
4110fa
and
can
,
,