MBM29F016A-12 FUJITSU [Fujitsu Component Limited.], MBM29F016A-12 Datasheet - Page 18

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MBM29F016A-12

Manufacturer Part Number
MBM29F016A-12
Description
16M (2M X 8) BIT
Manufacturer
FUJITSU [Fujitsu Component Limited.]
Datasheet
18
MBM29F016A
DQ
Toggle Bit II
Notes: 1. These status flags apply when outputs are read from a sector that has been erase-suspended.
RY/BY
Ready/Busy
Program
Erase
Erase Suspend Read (1)
(Erase-Suspended Sector)
Erase Suspend Program
erase cycle has begun; attempts to write subsequent commands (other than Erase Suspend) to the device will
be ignored until the erase operation is completed as indicated by Data Polling or Toggle Bit I. If DQ
the device will accept additional sector erase commands. To insure the command has been accepted, the system
software should check the status of DQ
were high on the second status check, the command may not have been accepted.
Refer to Table 7: Hardware Sequence Flags.
This toggle bit II, along with DQ
Algorithm or in Erase Suspend.
Successive reads from the erasing sector will cause DQ
the device is in the erase-suspended-read mode, successive reads from the erase-suspended sector will cause
DQ
address of the non-erase suspended sector will indicate a logic “1” at the DQ
DQ
Program operation is in progress. The behavior of these two status bits, along with that of DQ
as follows:
For example, DQ
DQ
Furthermore, DQ
mode, DQ
The MBM29F016A provides a RY/BY open-drain output pin as a way to indicate to the host system that the
Embedded Algorithms are either in progress or has been completed. If the output is low, the device is busy with
either a program or erase operation. If the output is high, the device is ready to accept any read/write or erase
operation. When the RY/BY pin is low, the device will not accept any additional program or erase commands
with the exception of the Erase Suspend command. If the MBM29F016A is placed in an Erase Suspend mode,
the RY/BY output will be high, by means of connecting with a pull-up resistor to V
During programming, the RY/BY pin is driven low after the rising edge of the fourth WE pulse. During an erase
operation, the RY/BY pin is driven low after the rising edge of the sixth WE pulse. The RY/BY pin will indicate a
busy condition during RESET pulse. Refer to Figure 11 for a detailed timing diagram. The RY/BY pin is pulled
high in standby mode.
2
2
6
6
2. These status flags apply when outputs are read from the byte address of the non-erase suspended sector.
to toggle. When the device is in the erase-suspended-program mode, successive reads from the byte
is different from DQ
does not). See also Table 7 and Figure 15.
2
toggles if this bit is read from the erasing sector.
Mode
2
2
and DQ
can also be used to determine which sector is being erased. When the device is in the erase
2
6
in that DQ
can be used together to determine the erase-suspend-read mode (DQ
-70/-90/-12
6
, can be used to determine whether the device is in the Embedded Erase™
6
toggles only when the standard program or Erase, or Erase Suspend
3
prior to and following each subsequent sector erase command. If DQ
DQ
DQ
DQ
0
1
7
(2)
7
7
2
to toggle during the Embedded Erase™ Algorithm. If
toggles
toggles
toggles
DQ
1
6
2
bit.
CC
.
7
toggles
toggles
, is summarized
1 (2)
DQ
2
1
toggles while
3
is low (“0”),
2
3

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