CY7B991-2 CYPRESS [Cypress Semiconductor], CY7B991-2 Datasheet - Page 4

• Manufacturer Part Number: CY7B991-2
• Description: Programmable Skew Clock Buffer
• Manufacturer: CYPRESS [Cypress Semiconductor]

Electrical Characteristics
Document #: 38-07138 Rev. **
V
V
V
V
V
V
V
I
I
I
I
I
I
I
I
PD
Notes:
Parameter
10. Total power dissipation per output pair can be approximated by the following expression that includes device power dissipation plus power dissipation due to
11. CMOS output buffer current and power dissipation specified at 50-MHz reference frequency.
IH
IL
IHH
IMM
ILL
OS
CCQ
CCN
6.
7.
8.
9.
OH
OL
IH
IL
IHH
IMM
ILL
See the last page of this specification for Group A subgroup testing information.
These inputs are normally wired to V
unconnected inputs at V
before all datasheet limits are achieved.
CY7B991 should be tested one output at a time, output shorted for less than one second, less than 10% duty cycle. Room temperature only. CY7B992 outputs
should not be shorted to GND. Doing so may cause permanent damage.
CY7B991: I
CY7B992: I
Where
the load circuit:
CY7B991: PD = [(22 + 0.61F) + [((1550 – 2.7F)/Z) + (.0125FC)]N] x 1.1
CY7B992: PD = [(19.25+ 0.94F) + [((700 + 6F)/Z) + (.017FC)]N] x 1.1
See note 9 for variable definition.
Total output current per output pair can be approximated by the following expression that includes device current plus load current:
F = frequency in MHz
C = capacitive load in pF
Z = line impedance in ohms
N = number of loaded outputs; 0, 1, or 2
FC = F
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
(REF and FB inputs only)
Input LOW Voltage
(REF and FB inputs only)
Three-Level Input HIGH
Voltage (Test, FS, xFn)
Three-Level Input MID
Voltage (Test, FS, xFn)
Three-Level Input LOW
Voltage (Test, FS, xFn)
Input HIGH Leakage Current
(REF and FB inputs only)
Input LOW Leakage Current
(REF and FB inputs only)
Input HIGH Current
(Test, FS, xFn)
Input MID Current
(Test, FS, xFn)
Input LOW Current
(Test, FS, xFn)
Output Short Circuit
Current
Operating Current Used by
Internal Circuitry
Output Buffer Current per
Output Pair
Power Dissipation per
Output Pair
CCN
CCN
C
= [(4 + 0.11F) + [((835 – 3F)/Z) + (.0022FC)]N] x 1.1
= [(3.5+ 0.17F) + [((1160 – 2.8F)/Z) + (.0025FC)]N] x 1.1
[8]
Description
CC
[9]
[10]
/2. If these inputs are switched, the function and timing of the outputs may glitch and the PLL may require an additional t
CC
Over the Operating Range
, GND, or left unconnected (actual threshold voltages vary as a percentage of V
[7]
[7]
[7]
V
V
V
V
Min. V
Min. V
Min. V
V
V
V
V
V
V
= GND (25 C only)
V
Max., All Input
Selects Open
V
I
Input Selects Open, f
V
I
Input Selects Open, f
OUT
OUT
CC
CC
CC
CC
CC
CC
IN
IN
IN
CC
CCN
CCN
CCN
= V
= V
= GND
= Max., V
= Max., V
= Max., V
= Min., I
= Min., I
= Min., I
= Min., I
= 0 mA
= 0 mA
Test Conditions
= V
= V
= V
CC
CC
CC
CC
CC
CCQ
CCQ
CCQ
/2
OH
OH
OL
OL
Max.
Max.
Max.
IN
IN
OUT
=
= Max.,
= Max.,
= Max.
= 0.4V
[6]
= 46 mA
= 46 mA
= –16 mA
=–40 mA
MAX
MAX
Mil/Ind
Com’l
V
CC
V
500 mV
–500
Min.
–0.5
CC
–50
2.4
2.0
0.0
– 0.85
CY7B991
/2 –
V
500 mV
–200
–250
Max.
0.45
CC
0.85
V
V
200
0.8
10
50
85
90
14
78
CC
CC
/2 +
CC
V
V
). Internal termination resistors hold
V
500 mV
CC
CC
V
–500
–0.5
Min.
CC
1.35
–50
0.0
CC
–0.75
– 0.85
CY7B992
/2 –
–
V
500 mV
104
–200
Max.
CY7B991
CY7B992
0.45
1.35
CC
0.85
V
V
200
N/A
10
50
85
90
19
CC
CC
Page 4 of 15
/2 +
[11]
LOCK
Unit
mW
mA
mA
mA
V
V
V
V
V
V
V
time
A
A
A
A
A