CY7C008 CYPRESS [Cypress Semiconductor], CY7C008 Datasheet - Page 11

• Manufacturer Part Number: CY7C008
• Description: 64K/128K x 8/9 Dual-Port Static RAM
• Manufacturer: CYPRESS [Cypress Semiconductor]

Switching Waveforms
Document #: 38-06041 Rev. *C
Timing Diagram of Semaphore Contention
Semaphore Read After Write Timing, Either Side
Notes:
35. CE = HIGH for the duration of the above timing (both write and read cycle).
36. I/O
37. Semaphores are reset (available to both ports) at cycle start.
38. If t
A
A
A
0R
0L
0
SPS
0R
SEM
SEM
SEM
–A
R/W
R/W
R/W
I/O
–A
–A
OE
= I/O
is violated, the semaphore will definitely be obtained by one side or the other, but which side will get the semaphore is unpredictable.
2
2L
0
2R
R
L
L
R
0L
= LOW (request semaphore); CE
t
SA
(continued)
VALID ADRESS
t
AW
R
= CE
WRITE CYCLE
t
t
PWE
SCE
t
L
SD
DATA
t
= HIGH.
MATCH
SPS
MATCH
[36, 37, 38]
t
IN
HA
VALID
[35]
t
HD
t
SWRD
t
SOP
t
SOP
READ CYCLE
t
SAA
VALID ADRESS
t
DOE
t
ACE
DATA
OUT
VALID
CY7C008/009
CY7C018/019
t
OHA
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