M29W640FB STMICROELECTRONICS [STMicroelectronics], M29W640FB Datasheet - Page 24

• Manufacturer Part Number: M29W640FB
• Description: 64 Mbit (8Mb x8 or 4Mb x16, Page, Boot Block) 3V Supply Flash Memory
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

4 Command Interface
4.2.3
4.2.4
24/72
Octuple Byte Program command
Double Word Program command
This is used to write eight adjacent Bytes, in x8 mode, simultaneously. The addresses of the
eight Bytes must differ only in A1, A0 and DQ15A-1.
Nine bus write cycles are necessary to issue the command:
1.
2.
3.
4.
5.
6.
7.
8.
9.
The Double Word Program command is used to write a page of two adjacent Words in parallel.
The two Words must differ only for the address A0.
Three bus write cycles are necessary to issue the Double Word Program command.
After the program operation has completed the memory will return to the Read mode, unless an
error has occurred. When an error occurs Bus Read operations will continue to output the
Status Register. A Read/Reset command must be issued to reset the error condition and return
to Read mode.
Note that the Fast Program commands cannot change a bit set at ’0’ back to ’1’. One of the
Erase Commands must be used to set all the bits in a block or in the whole memory from ’0’ to
’1’.
Typical Program times are given in
Endurance
The first bus cycle sets up the command.
The second bus cycle latches the Address and the Data of the first Byte to be written.
The third bus cycle latches the Address and the Data of the second Byte to be written.
The fourth bus cycle latches the Address and the Data of the third Byte to be written.
The fifth bus cycle latches the Address and the Data of the fourth Byte to be written.
The sixth bus cycle latches the Address and the Data of the fifth Byte to be written.
The seventh bus cycle latches the Address and the Data of the sixth Byte to be written.
The eighth bus cycle latches the Address and the Data of the seventh Byte to be written.
The ninth bus cycle latches the Address and the Data of the eighth Byte to be written and
starts the Program/Erase Controller.
The first bus cycle sets up the Quadruple Word Program Command.
The second bus cycle latches the Address and the Data of the first Word to be written.
The third bus cycle latches the Address and the Data of the second Word to be written and
starts the Program/Erase Controller.
Cycles.
Table 7: Program, Erase Times and Program, Erase
M29W640FT, M29W640FB