CAT1161LI-30T2 CATALYST [Catalyst Semiconductor], CAT1161LI-30T2 Datasheet
CAT1161LI-30T2
Related parts for CAT1161LI-30T2
CAT1161LI-30T2 Summary of contents
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Supervisory Circuits with I Precision Reset Controller and Watchdog Timer (16K) FEATURES Watchdog monitors SDA signal (CAT1161) 2 400kHz I C bus compatible 2.7V to 6.0V operation Low power CMOS technology 16-Byte page write buffer Built-in inadvertent write protection — ...
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CAT1161, CAT1162 BLOCK DIAGRAM EXTERNA L LOAD SENSEAMPS D OUT SHIFT REGISTERS ACK V CC WORDADDRESS GND BUFFERS DECODERS START/STOP SDA LOGIC XDEC CONTR OL WP LOGIC DATA IN STORAGE HIGHVOLTAGE/ TIMING CONTR OL RESET Controller STATE COUNTERS Precision SLAVE ...
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D.C. OPERATING CHARACTERISTICS V = 2.7V to 6V, unless otherwise specified. CC Symbol Parameter I Power Supply Current CC I Standby Current SB I Input Leakage Current LI I Output Leakage Current LO V Input Low Voltage IL V Input ...
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CAT1161, CAT1162 WRITE CYCLE LIMITS Symbol Parameter t Write Cycle Time WR The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal program/erase cycle. During the write cycle, ...
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PIN DESCRIPTION WP: WRITE PROTECT If the pin is tied to V the entire memory array CC becomes Write Protected (READ only). When the pin is tied to GND or left floating normal read/write operations are allowed to the device. ...
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CAT1161, CAT1162 Hardware Data Protection The CAT1161/2 is designed with the following hardware data protection features to provide a high degree of data integrity. (1) The CAT1161/2 features a WP pin. When the WP pin is tied high the entire ...
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FUNCTIONAL DESCRIPTION 2 The CAT1161/2 supports the I C Bus data transmis– sion protocol. This Inter-Integrated Circuit Bus proto– col defines any device that sends data to the bus transmitter and any device receiving data to be ...
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CAT1161, CAT1162 Acknowledge After a successful data transfer, each receiving device is required to generate an acknowledge. The acknowledging device pulls down the SDA line during the ninth clock cycle, signaling that it received the 8 bits of data. The ...
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Acknowledge Polling Disabling of the inputs can be used to take advantage of the typical write cycle time. Once the stop condition is issued to indicate the end of the host’s write opration, the CAT1161/2 initiates the internal write cycle. ...
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CAT1161, CAT1162 Selective/Random Read Selective/Random READ operations allow the Master device to select at random any memory location for a READ operation. The Master device first performs a ‘dummy’ write operation by sending the START condition, slave address and byte ...
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PACKAGE OUTLINES 8-LEAD 300 MIL WIDE PLASTIC DIP ( 0.38 A2 3.05 b 0.36 0.46 b2 1.14 c 0.21 0.26 D 9.02 E 7.62 7.87 E1 6.09 6.35 e 2.54 BSC eB 7.87 ...
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CAT1161, CAT1162 8-LEAD 150 MIL SOIC ( SYMBOL MIN A1 0.10 A 1.35 b 0.33 C 0.19 D 4.80 E 5. 0.25 L 0.40 q1 0° For current Tape and Reel information, download ...
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... NiPdAu is a lead finish option on the Green packages only. Unless indicated with a “G”, the Pb-free packages are shipped with a Sn matte lead finish. ORDERING PART NUMBER CAT1161LI-45 CAT1162LI-45 CAT1161LI-42 CAT1162LI-42 CAT1161LI-30 CAT1162LI-30 CAT1161LI-28 CAT1162LI-28 CAT1161LI-25 CAT1162LI-25 CAT1161WI-45 CAT1162WI-45 CAT1161WI-42 CAT1162WI-42 CAT1161WI-30 CAT1162WI-30 CAT1161WI-28 CAT1162WI-28 CAT1161WI-25 CAT1162WI-25 © ...
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REVISION HISTORY Date Rev. Reason Add Green Logo 02/17/05 E Add Package Outline Update Ordering Information Update Package Outline 02/02/07 F Update Example of Ordering Information Copyrights, Trademarks and Patents Trademarks and registered trademarks of Catalyst Semiconductor include ech of ...