APA075-FG896A ACTEL [Actel Corporation], APA075-FG896A Datasheet - Page 4

• Manufacturer Part Number: APA075-FG896A
• Description: Automotive-Grade ProASIC Flash Family FPGAs
• Manufacturer: ACTEL [Actel Corporation]

Operating Conditions
Table 1 • Absolute Maximum Ratings*
Performance Retention
Actel guarantees the performance numbers presented in the Actel Designer timing analysis software and in this
datasheet, as long as the specified device performance retention period is not exceeded. For devices operated and
stored at 110°C or less, the performance retention period is 20 years after programming. For devices operated and
stored at temperatures greater than 110°C, refer to
Actel does not guarantee performance if the performance retention period is exceeded. Evaluate the percentage of
time spent at the highest temperature, then determine the next highest temperature to which the device will be
exposed. In
For example, the ambient temperature of a system cycles between 100°C (25% of the time) and 50°C (75% of the
time). No forced ventilation cooling system is in use. An APA600-PQ208A FPGA operates in the system, dissipating 1W.
The package thermal resistance (junction-to-ambient) in still air is 20°C/W, indicating that the junction temperature of
the FPGA will be 120°C (25% of the time) and 70°C (75% of the time). The entry in
closely matches the application, is 25% at 125°C with 75% at 110°C. Performance retention in this example is at least
16.0 years.
Note that exceeding the stated retention period may result in a performance degradation in the FPGA below the
worst-case performance indicated in the Actel Timer. To ensure that performance does not degrade below the worst-
case values in the Actel Timer, the FPGA must be reprogrammed within the performance retention period. In addition,
note that performance retention is independent of whether or not the FPGA is operating. The retention period of a
device in storage at a given temperature will be the same as the retention period of a device operating at that
junction temperature.
4
Parameter
Supply Voltage Core (V
Supply Voltage I/O Ring (V
DC Input Voltage
PCI DC Input Voltage
PCI DC Input Clamp Current (absolute)
LVPECL Input Voltage
GND
Note: *Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to
Automotive-Grade ProASIC
absolute maximum rated conditions for extended periods may affect device reliability.
Table 2 on page
DD
)
DDP
)
5, find the temperature profile that most closely matches the application.
PLUS
Flash Family FPGAs
V
IN
< –1V or V
A u t o m o t i v e S u pp l e m e n t
Condition
Table 2 on page 5
IN
= V
DDP
+ 1V
to determine the performance retention period.
Minimum
–0.3
–0.3
–0.3
–1.0
–0.3
10
0
Table 2 on page
Maximum
V
V
V
DDP
DDP
DDP
3.0
4.0
0
+ 0.3
+ 1.0
+ 0.5
5, which most
Units
mA
V
V
V
V
V
V