MK1411S ICST [Integrated Circuit Systems], MK1411S Datasheet - Page 2

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MK1411S

Manufacturer Part Number
MK1411S
Description
NTSC/PAL Clock Source
Manufacturer
ICST [Integrated Circuit Systems]
Datasheet
Pin Assignment
MDS 1410/11 E
X1/ICLK
External Components/Crystal Selection
A minimum number of external components are required for proper oscillation. For a crystal input, a
parallel resonant 14.31818 MHz, 18pF load, crystal is recommended. Do not use a crystal with lower load
capacitance. It is possible to use a crystal with higher load capacitance. In this case, external capacitors must
be connected from each of X1 and X2 to ground. The value of these caps equals 2(C
crystal load capacitance in pF. So for a 20 pF crystal, use 4 pF caps. The frequency tolerance of the crystal
should be 30ppm or better. For a clock input, connect to X1 and leave X2 unconnected. A decoupling
capacitor of 0.1µF should be connected between VDD and GND on pins 2 and 3, and a 33 terminating
resistor should be used on the clock output if the trace is longer than 1 inch.
Pin Descriptions
MK1410 MK1411
Key: I = Input, O = output, P = power supply connection
Integrated Circuit Systems, Inc.•525 Race Street•San Jose•CA•95126•(408)295-9800tel•www.icst.com
14.3M
NTSC/PAL Clock - MK1410
VDD
GND
1
2
3
4
5
-
6
-
7
8
pin 6
SEL
0
1
pin 5 (MHz)
1
2
3
-
4
5
-
6
7
8
17.73448
14.31818
NPCLK
3
4
1
2
MK1410
X1/ICLK
NPCLK
14.3M
Name
VDD
GND
SEL
PD
X2
S1
S0
ppm error
5 ppm
0 ppm
Type Description
8
7
6
5
O
O
O
P
P
I
I
I
I
I
NPCLK
SEL
X2
PD
Crystal Connection. Connect to a 14.31818 MHz crystal or clock.
Connect to +3.3V or +5V.
Connect to ground.
14.31818 MHz buffered crystal clock output.
NTSC or PAL output clock. Selected by SEL pin per tables above.
Select pin. Selects NTSC or PAL frequency per tables above.
Select pin. Selects NTSC or PAL frequency per tables above.
Select pin. Selects NTSC or PAL frequency per tables above. Internal pull-up.
Power Down. Active low. Clocks stop low.
Crystal Connection to a 14.31818 MHz crystal, or leave unconnected for clock input.
2
X1/ICLK
NPCLK
NTSC/PAL Clock - MK1411
pin 5
VDD
GND
S1
0
0
1
1
NTSC/PAL Clock Source
pin 6
S0
0
1
0
1
Revision 102298
1
2
3
4
MK1411
pin 4 (MHz)
MK1410/MK1411
35.46896
17.73448
28.63636
14.31818
NPCLK
L
-18), where C
8
7
6
5
ppm error
5 ppm
5 ppm
0 ppm
0 ppm
S1
S0
X2
PD
Printed 11/15/00
L
is the

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