MK1411S ICST [Integrated Circuit Systems], MK1411S Datasheet - Page 3

• Manufacturer Part Number: MK1411S
• Description: NTSC/PAL Clock Source
• Manufacturer: ICST [Integrated Circuit Systems]

MDS 1410/11 E
Electrical Specifications
Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged exposure
2. Typical values are at 25°C.
Application Note
The MK1410/11 is commonly used to drive an AD722/4 NTSC/PAL encoder. If the encoder is not
displaying the proper color, this means that the input frequency to the MK1410/11 is incorrect. This is
caused by using the wrong type of crystal, or by connecting incorrect capacitors to X1 and X2. To get
correct color, specify the crystal as listed on page 2. The MK1410/11 has internal crystal capacitors set for a
crystal with 18 pF load capacitance. Contact MicroClock if unable to obtain the listed crystal.
Parameter
ABSOLUTE MAXIMUM RATINGS (note 1)
ABSOLUTE MAXIMUM RATINGS (note 1)
Supply Voltage, VDD
Inputs
Clock Outputs
Ambient Operating Temperature
Soldering Temperature
Storage temperature
DC CHARACTERISTICS (at 5.0V unless otherwise noted)
DC CHARACTERISTICS (at 5.0V unless otherwise noted)
DC CHARACTERISTICS (at 5.0V unless otherwise noted)
Operating Voltage, VDD
Input High Voltage, VIH, input clock only
Input Low Voltage, VIL, input clock only
Input High Voltage, VIH
Input Low Voltage, VIL
Output High Voltage, VOH
Output High Voltage, VOH
Output Low Voltage, VOL
Operating Supply Current, IDD, 5.0V
Operating Supply Current, IDD, 3.0V
Power Down Supply Current, IDDPD, 5V
Input Capacitance
Actual Mean Frequency versus Target
AC CHARACTERISTICS (at 5.0V unless otherwise noted)
AC CHARACTERISTICS (at 5.0V unless otherwise noted)
AC CHARACTERISTICS (at 5.0V unless otherwise noted)
Input Clock or Crystal Frequency
Input Crystal Accuracy
Input Clock Duty Cycle
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle
Absolute Maximum Clock Period Jitter
One Sigma Clock Period Jitter
Integrated Circuit Systems, Inc.•525 Race Street•San Jose•CA•95126•[phone]tel•www.icst.com
to levels above the operating limits but below the Absolute Maximums may affect device reliability.
Conditions
Referenced to GND
Referenced to GND
Referenced to GND
Max of 10 seconds
Clock input
Clock input
IOH=-4mA
IOH=-25mA
IOL=25mA
No Load, 17.7 MHz
No Load, 17.7 MHz
No Load
SEL, PD pins
With exact crystal
Time above 2.5V
0.8 to 2.0V
2.0 to 0.8V
Time above 1.5V
Variation from mean
3
Minimum
VDD-0.4
14.31818
-0.5
-0.5
NTSC/PAL Clock Source
-65
3.0
3.5
2.4
20
45
0
2
Revision 102298
Typical
130
2.5
2.5
16
25
50
40
MK1410/MK1411
9
7
5
Maximum
VDD+.5V
VDD+.5V
14.31818
260
150
5.5
1.5
0.8
0.4
1.5
1.5
70
30
80
55
7
5
Printed 11/15/00
Units
MHz
ppm
ppm
mA
mA
°C
°C
°C
µA
pF
%
%
V
V
V
V
V
V
V
V
V
V
V
ns
ns
ps
ps