CAT24WC08 CATALYST [Catalyst Semiconductor], CAT24WC08 Datasheet - Page 4

• Manufacturer Part Number: CAT24WC08
• Description: 1K/2K/4K/8K/16K-Bit Serial EEPROM
• Manufacturer: CATALYST [Catalyst Semiconductor]

The CAT24WC01/02/04/08/16 supports the I
data transmission protocol. This Inter-Integrated Circuit
Bus protocol defines any device that sends data to the
bus to be a transmitter and any device receiving data to
be a receiver. Data transfer is controlled by the Master
device which generates the serial clock and all START
and STOP conditions for bus access. The CAT24WC01/
02/04/08/16 operates as a Slave device. Both the Mas-
ter and Slave devices can operate as either transmitter
or receiver, but the Master device controls which mode
is activated. A maximum of 8 devices (CAT24WC01 and
CAT24WC02), 4 devices (CAT24WC04), 2 devices
(CAT24WC08) and 1 device (CAT24WC16) may be
connected to the bus as determined by the device
address inputs A0, A1, and A2.
Doc. No. 1022, Rev. N
SDA OUT
SDA IN
SCL
SCL
SDA
t SU:STA
SDA
SCL
t F
8TH BIT
BYTE n
t HD:STA
t LOW
START BIT
t AA
ACK
t HD:DAT
t HIGH
2
C Bus
t LOW
STOP
CONDITION
4
t DH
The CAT24WC01/02/04/08/16 serial clock input pin is
used to clock all data transfers into or out of the device.
This is an input pin.
The CAT24WC01/02/04/08/16 bidirectional serial data/
address pin is used to transfer data into and out of the
device. The SDA pin is an open drain output and can be
wire-ORed with other open drain or open collector
outputs.
These inputs set device address when cascading mul-
tiple devices. When these pins are left floating the
default values are zeros.
A maximum of eight devices can be cascaded when
t SU:DAT
t R
Serial Clock
Serial Data/Address
t WR
Device Address Inputs
START
CONDITION
STOP BIT
Characteristics subject to change without notice
t SU:STO
t BUF
© 2005 by Catalyst Semiconductor, Inc.
ADDRESS
5020 FHD F03
5020 FHD F04
5020 FHD F05