ISL32490E INTERSIL [Intersil Corporation], ISL32490E Datasheet - Page 9

• Manufacturer Part Number: ISL32490E
• Manufacturer: INTERSIL [Intersil Corporation]

Electrical Specifications
Boldface limits apply over the operating temperature range, -40°C to +85°C.
NOTES:
10. The RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
11. Transceivers are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts are guaranteed not to
12. Keep RE = V
13. Set the RE signal high time >600ns to ensure that the device enters SHDN.
14. Compliance to data sheet limits is assured by one or more methods: production test, characterization and/or design.
15. Tested according to TIA/EIA-485-A, Section 4.2.6 (±80V for 15µs at a 1% duty cycle).
16. See “Caution” statement below the “Latch-up (Tested per JESD78, Level 2, Class A) +125°C” section on page 5.
RECEIVER SWITCHING CHARACTERISTICS (15Mbps Versions; ISL32496E, ISL32498E)
6. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
7. Supply current specification is valid for loaded drivers when DE = 0V.
8. Applies to peak current. See “Typical Performance Curves VCC = 5V, TA = +25°C; Unless Otherwise Specified.” beginning on page 14 for more
9. Keep RE = 0 to prevent the device from entering SHDN.
t
t
t
t
SYMBOL
PLH
ZH(SHDN)
ZL(SHDN)
ZL(SHDN)
t
ISL32490E, ISL32492E, ISL32493E, ISL32495E, ISL32496E, ISL32498E
f
specified.
information.
enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See “Low Power Shutdown
Mode” on page 13.
t
SHDN
MAX
SKD
t
t
t
t
ZH
HZ
ZL
LZ
, t
PHL
Receiver Enable from
Shutdown to Output Low
Maximum Data Rate
Receiver Input to Output Delay -25V ≤ V
Receiver Skew |t
Receiver Enable to Output
Low
Receiver Enable to Output
High
Receiver Disable from Output
Low
Receiver Disable from Output
High
Time to Shutdown
Receiver Enable from
Shutdown to Output High
Receiver Enable from
Shutdown to Output Low
CC
, and set the DE signal low time >600ns to ensure that the device enters SHDN.
PARAMETER
PLH
9
- t
PHL
Test Conditions: V
|
R
(Notes 11, 13)
-25V ≤ V
(Figure 7)
R
(Note 10)
R
(Note 10)
R
R
(Note 11)
R
(Notes 11, 13)
R
(Notes 11, 13)
L
L
L
L
L
L
L
= 1kΩ, C
= 1kΩ, C
= 1kΩ, C
= 1kΩ, C
= 1kΩ, C
= 1kΩ, C
= 1kΩ, C
CM
CM
L
≤ 25V (Figure 7)
≤ 25V (Figure 7)
L
L
L
L
L
L
CC
TEST CONDITIONS
= 15pF, SW = V
= 15pF, SW = V
= 15pF, SW = GND (Figure 8),
= 15pF, SW = V
= 15pF, SW = GND (Figure 8)
= 15pF, SW = GND (Figure 8),
= 15pF, SW = V
= 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at V
CC
CC
CC
CC
(Continued)
(Figure 8),
(Figure 8),
(Figure 8)
(Figure 8),
TEMP
(°C)
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
(Note 14)
MIN
15
60
-
-
-
-
-
-
-
-
-
160
TYP
25
35
4
-
-
-
-
-
-
-
CC
= 5V, T
(Note 14)
2000
2000
2000
A
MAX
600
70
10
50
50
50
50
= +25°C (Note 6).
-
January 18, 2011
FN7786.0
UNITS
Mbps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns