HEF4516B_09 NXP [NXP Semiconductors], HEF4516B_09 Datasheet
HEF4516B_09
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HEF4516B_09 Summary of contents
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HEF4516B Binary up/down counter Rev. 06 — 11 December 2009 1. General description The HEF4516B is an edge-triggered synchronous 4-bit binary up/down counter with a clock input (CP), an up/down count control input (UP/DN), an active LOW count enable input ...
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NXP Semiconductors 5. Functional diagram Fig 1. Functional diagram HEF4516B_6 Product data sheet PARALLEL LOAD CIRCUITRY UP/DOWN UP/DN COUNTER ...
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NXP Semiconductors UP/DN CE Fig 2. Logic diagram HEF4516B_6 Product data sheet FF1 FF2 ...
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NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 3. Pin configuration 6.2 Pin description Table 2. Pin description Symbol Pin 12, 13 11, 14 ...
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NXP Semiconductors 7. Functional description [1] Table 3. Function table HIGH voltage level LOW voltage level don’t care; ↑ = positive-going transition. ...
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NXP Semiconductors Logic equation for terminal count: • ⁄ Fig 5. State diagram 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol ...
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NXP Semiconductors Table 5. Recommended operating conditions Symbol Parameter Δt/ΔV input transition rise and fall rate 10. Static characteristics Table 6. Static characteristics unless otherwise specified Symbol ...
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NXP Semiconductors 11. Dynamic characteristics Table 7. Dynamic characteristics ° for test circuit see SS amb Symbol Parameter Conditions t HIGH to LOW PHL propagation delay ...
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NXP Semiconductors Table 7. Dynamic characteristics ° for test circuit see SS amb Symbol Parameter Conditions t transition time t f maximum frequency see max t pulse width CP input LOW; W ...
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NXP Semiconductors Table 8. Dynamic power dissipation P P can be calculated from the formulas shown Symbol Parameter dynamic power dissipation 12. Waveforms input V ...
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NXP Semiconductors negative positive a. Input waveforms b. Test circuit Test data is given in Table 9. Definitions for test circuit: DUT = Device Under Test C = Load capacitance including jig and probe capacitance Termination resistance ...
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NXP Semiconductors 13. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT b max. min. ...
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NXP Semiconductors SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. ...
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NXP Semiconductors 14. Revision history Table 10. Revision history Document ID Release date HEF4516B_6 20091211 • Modifications: Section 9 “Recommended operating conditions” HEF4516B_5 20090812 HEF4516B_4 20090312 HEF4516B_CNV_3 19950101 HEF4516B_CNV_2 19950101 HEF4516B_6 Product data sheet Data sheet status Change notice Product ...
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NXP Semiconductors 15. Legal information 15.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...
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NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...