MC74LCX652DW ONSEMI [ON Semiconductor], MC74LCX652DW Datasheet

MC74LCX652DW

Manufacturer Part Number

MC74LCX652DW

Description

LOW.VOLTAGE CMOS OCTAL TRANSCEIVER/ REGISTERED TRANSCEIVER WITH DUAL ENABLE

Manufacturer

ONSEMI [ON Semiconductor]

Datasheet

1.MC74LCX652DW.pdf (9 pages)

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Low-Voltage CMOS Octal

Transceiver/Registered

Transceiver With Dual Enable

With 5V-Tolerant Inputs and Outputs

(3-State, Non-Inverting)

transceiver/registered transceiver operating from a 2.7 to 3.6V supply.

High impedance TTL compatible inputs significantly reduce current

loading to input drivers while TTL compatible outputs offer improved

switching noise performance. A V I specification of 5.5V allows

MC74LCX652 inputs to be safely driven from 5V devices. The

MC74LCX652 is suitable for memory address driving and all TTL level

bus oriented transceiver applications.

appropriate clock pin goes from a LOW–to–HIGH logic level. Two Output

Enable pins (OEBA, OEAB) are provided to control the transceiver

outputs. In the transceiver mode, data present at the high impedance port

may be stored in either the A or the B register or in both. The select

controls (SBA, SAB) can multiplex stored and real–time (transparent

mode) data. In the isolation mode (both outputs disabled), A data may be

stored in the B register or B data may be stored in the A register. When in

the real–time mode, it is possible to store data without using the internal

registers by simultaneously enabling OEAB and OEBA. In this

configuration, each output reinforces its input (data retention is not

guaranteed in this mode).

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

3/97

Motorola, Inc. 1997

Designed for 2.7 to 3.6V V CC Operation

5V Tolerant — Interface Capability With 5V TTL Logic

Supports Live Insertion and Withdrawal

I OFF Specification Guarantees High Impedance When V CC = 0V

LVTTL Compatible

LVCMOS Compatible

24mA Balanced Output Sink and Source Capability

Near Zero Static Supply Current in All Three Logic States (10 A)

Substantially Reduces System Power Requirements

Latchup Performance Exceeds 500mA

ESD Performance: Human Body Model >2000V; Machine Model >200V

The MC74LCX652 is a high performance, non–inverting octal

Data on the A or B bus will be clocked into the registers as the

V CC

CAB SAB OEAB A0

CBA SBA OEBA B0

Figure 1. 24–Lead Pinout (Top View)

GND

PIN NAMES

Pins

A0–A7

B0–B7

CAB, CBA

SAB, SBA

OEBA, OEAB

REGISTERED TRANSCEIVER

REV 1

24–LEAD PLASTIC TSSOP PACKAGE

24–LEAD PLASTIC SSOP PACKAGE

OCTAL TRANSCEIVER/

24–LEAD PLASTIC SOIC PACKAGE

MC74LCX652

LOW–VOLTAGE CMOS

WITH DUAL ENABLE

CASE 940D–03

CASE 948H–01

CASE 751E–04

Function

Side A Inputs/Outputs

Side B Inputs/Outputs

Clock Pulse Inputs

Select Control Inputs

Output Enable Inputs

DW SUFFIX

SD SUFFIX

DT SUFFIX

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