CY7C68300C CYPRESS [Cypress Semiconductor], CY7C68300C Datasheet - Page 8

• Manufacturer Part Number: CY7C68300C
• Manufacturer: CYPRESS [Cypress Semiconductor]

Document 001-05809 Rev. *A
Pin Descriptions
The following table lists the pinouts for the 56-pin SSOP, 56-pin
QFN and 100-pin TQFP package options for the AT2LP. Refer
to the
Table 1. AT2LP Pin Descriptions
Notes
1. If byte 8, bit 4 of the EEPROM is set to ‘0’, the ATA interface pins are only active when VBUS_ATA_EN is asserted. See
2. A ‘#’ sign after the pin name indicates that it is active LOW.
TQFP
26
100
10
12
13
14
15
16
17
18
19
20
21
22
23
24
25
27
28
29
11
page 14
1
2
3
4
5
6
7
8
9
[3]
“Pin Diagrams” on page 3
QFN
13
N/A
N/A
N/A
N/A
N/A
Note: (Italic pin names denote pin functionality during CY7C68300A compatibility mode)
.
56
55
56
10
11
12
14
15
1
2
3
4
5
6
7
8
9
[3]
SSOP
N/A
N/A
N/A
N/A
N/A
56
10
12
13
14
15
16
17
18
19
20
21
22
11
6
7
8
9
GND (RESERVED)
PWR500#
Pin Name
XTALOUT
(PU 10K)
DMINUS
DMARQ
SYSIRQ
XTALIN
DPLUS
for differences between the
IORDY
AGND
AV
GND
GND
GND
GND
GND
SCL
V
V
V
NC
NC
CC
CC
CC
CC
[2]
PWR
PWR
PWR
PWR
Type
GND
GND
GND
GND
GND
Xtal
Xtal
Pin
I
I
IO
IO
O
O
[1]
[1]
I
Default State
several ms at
at Startup
Active for
startup.
Input
Input
Input
Hi-Z
Hi-Z
Xtal
Xtal
68300C/01C and 68320C/321C pinouts for the 56-pin
packages. For information on the CY7C68300A pinout, refer
to the CY7C68300A data sheet that is found in the ’EZ-USB
AT2’ folder of the CY4615C reference design kit CD.
V
Ground.
ATA control. Apply a 1k pull up to 3.3V.
ATA control.
Ground.
Analog V
possible.
24 MHz crystal output. (See
page
24 MHz crystal input. (See
page
Analog ground. Connect to ground with as short a
path as possible.
No connect.
V
USB D+ signal (See
USB D–signal (See
Ground.
V
Ground.
USB interrupt request. (See
Active HIGH. Connect to GND if functionality is not
used.
Ground.
bMaxPower request granted indicator. (See
“PWR500#” on page
N/A for CY7C68320C/CY7C68321C 56-pin packages.
Reserved. Tie to GND.
No connect.
Clock signal for I
page
CC
CC
CC
. Connect to 3.3V power source.
. Connect to 3.3V power source.
. Connect to 3.3V power source.
11).
11).
11). Apply a 2.2k pull up resistor.
CY7C68300C/CY7C68301C
CY7C68320C/CY7C68321C
CC
. Connect to V
2
Pin Description
C interface. (See
“DPLUS, DMINUS” on page
14). Active LOW.
“DPLUS, DMINUS” on page
“VBUS_ATA_ENABLE” on
CC
“XTALIN, XTALOUT” on
through the shortest path
“XTALIN, XTALOUT” on
“SYSIRQ” on page
“SCL, SDA” on
Page 8 of 42
11).
12).
11).
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