TDA7501TR STMICROELECTRONICS [STMicroelectronics], TDA7501TR Datasheet - Page 17

• Manufacturer Part Number: TDA7501TR
• Description: Line driver for digital car radio Signal processor (DSPLD)
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

TDA7501
7
7.1
SPI bus mode
Interface protocol
The TDA7501 SPI interface protocol comprises :
●
●
each consisting of 8 bits (see
The interface accepts both a positiv (Cpol = 1, Cpha = 1) as well as a negativ (Cpol = 0,
Cpha = 0) clocking scheme. However, the data transmitted has to be valid on the rising
edges of the serial clock SCL.
Figure 14. Timing diagram for the SPI bus mode.
Table 5.
Figure 15. Timing diagram for switching characteristic
Symbol
f
SCLK
T
T
T
T
T
T
T
t
t
hld
wh
scl
su
rel
sh
wl
r
f
a subaddress and
a sequence of n databytes
Cpol=1
Cpol=0
SCL
SCL
SDA
SEL
Serial input clock frequency (SCL)
Serial data setup time
Serial data hold time
Serial clock high time width
Serial clock low time width
Select (SEL) to select (SCL) falling setup time
Select (SCL) to select (SEL) rising release time
Data rise time
Data fall time
Chip select high time
Switching characteristics (SPI mode)
SUBADDRESS
SA3
SDA
SEL
SCL
SA2 SA1 SA0
Figure
T scl
Parameter
14).
D7
T su
D6
D5
T hld
D4
DATA
D3
SAx,Dy
D2
T wh
D1
T wl
D0
T rel
D7
Min.
100
100
200
200
200
40
40
T sh
D00AU1208
0
D6
D5
D4
Typ.
DATA-n
D3
SPI bus mode
D2
Max.
D1
4.0
2
2
D00AU1209
D0
MHz
Unit
17/29
ms
ms
ns
ns
ns
ns
ns
ns
ns