PCF2119AU NXP [NXP Semiconductors], PCF2119AU Datasheet - Page 27

• Manufacturer Part Number: PCF2119AU
• Description: LCD controllers/drivers Single-chip LCD controller and driver
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
10. Registers
PCF2119X
Product data sheet
The PCF2119x has two 8-bit registers, an instruction register and a data register. Only
these two registers can be directly controlled by the microcontroller. Before an internal
operation, the control information is stored temporarily in these registers, to allow
interfacing to various types of microcontrollers which operate at different speeds or to
allow interface to peripheral control ICs.
The instruction set for the parallel interface is shown in
execution time. Details about the parallel interface can be found in
Examples of operations on a 4-bit bus are given in
Table 40
When using the I
shown in
example of operations on the I
Table 8.
[1]
Table 9.
Instructions are of 4 types, those that:
In normal use, type 3 instructions are used most frequently. However, automatic
incrementing by 1 (or decrementing by 1) of internal RAM addresses after each data write
lessens the microcontroller program load. The display shift in particular can be performed
concurrently with display data write, enabling the designer to develop systems in minimum
time with maximum programming efficiency.
During internal operation, no instructions other than the BF_AC instruction will be
executed. Because the busy flag is set to logic 1 while an instruction is being executed,
check to ensure it is logic 0 before sending the next instruction or wait for the maximum
instruction execution time, as given in
logic 1 will not be executed.
Control byte
CO
Bit
7
6
4 to 0
1. Designate PCF2119x functions like display format, data length, etc.
2. Set internal RAM addresses
3. Perform data transfer with internal RAM
4. Others, like read ‘busy flag’ and read ‘address counter’
R/W is set together with the slave address (see
RS
and
Symbol
CO
RS
-
Table
Instruction set for I
Control byte bit description
0
Table
0
8. Details about the I
All information provided in this document is subject to legal disclaimers.
2
C-bus, the instruction has to be commenced with a control byte as
0
41.
0
Rev. 7 — 15 November 2010
Value
0
1
0
1
0
0
0
2
C-bus commands
2
C-bus is given in
Command byte
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
2
Description
last control byte
another control byte follows after data/command
instruction register selected
data register selected
default logic 0
C-bus interface can be found in
Table
Figure
11. An instruction sent while the busy flag is
31).
Table
Table
42.
Table 11
38, on a 8-bit bus in
LCD controllers/drivers
together with their
Section
PCF2119x
Section
© NXP B.V. 2010. All rights reserved.
11.1.
I
command
[1]
2
C-bus
Table
11.2. An
27 of 83
39,