PCF8583BS NXP [NXP Semiconductors], PCF8583BS Datasheet - Page 11

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PCF8583BS

Manufacturer Part Number
PCF8583BS
Description
Clock and calendar with 240 x 8-bit RAM
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
PCF8583
Product data sheet
7.7 Timer
The timer (location 07h) is enabled by setting the control and status register to
XX0X X1XX. The timer counts up from 0 (or a programmed value) to 99. On overflow, the
timer resets to 0. The timer flag (LSB of control and status register) is set on overflow of
the timer. This flag must be reset by software. The inverted value of this flag can be
transferred to the external interrupt by setting bit 3 of the alarm control register.
Additionally, a timer alarm can be programmed by setting the timer alarm enable (bit 6 of
the alarm control register). When the value of the timer equals a pre-programmed value in
the alarm timer register (location 0Fh), the alarm flag is set (bit 1 of the control and status
register). The inverted value of the alarm flag can be transferred to the external interrupt
by enabling the alarm interrupt (bit 6 of the alarm control register).
Resolution of the timer is programmed via the 3 LSBs of the alarm control register (see
Figure
Fig 11. Selection of alarm weekdays
12).
MSB
013aaa375
7
6
All information provided in this document is subject to legal disclaimers.
5
Rev. 06 — 6 October 2010
4
3
2
1
LSB
0
Clock and calendar with 240 x 8-bit RAM
memory location 0Eh (alarm_weekday/month)
weekday 0 enabled when set
weekday 1 enabled when set
weekday 2 enabled when set
weekday 3 enabled when set
weekday 4 enabled when set
weekday 5 enabled when set
weekday 6 enabled when set
not used
PCF8583
© NXP B.V. 2010. All rights reserved.
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