PCA85232DA NXP [NXP Semiconductors], PCA85232DA Datasheet - Page 36
PCA85232DA
Manufacturer Part Number
PCA85232DA
Description
LCD driver for low multiplex rates
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PCA85232DA.pdf
(54 pages)
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NXP Semiconductors
PCA85232
Product data sheet
Fig 25. I
SDA
SDA
SCL
SCL
2
C-bus timing waveforms when SDA and SDAACK are connected
t
SU;STA
70 %
30 %
S
t
t
f
HD;STA
t
f
70 %
30 %
Fig 24. Driver timing waveforms
Sr
1
st
and S0 to S159
1 / f
clock cycle
t
BP0 to BP3,
r
SCL
t
HD;STA
SYNC
CLK
t
HD;DAT
t
70 %
30 %
PD(SYNC_N)
All information provided in this document is subject to legal disclaimers.
70 %
30 %
t
SP
t
SU;DAT
Rev. 1 — 8 December 2010
t
PD(drv)
t
t
r
clk(H)
70 %
30 %
70 %
30 %
t
t
SYNC_NL
VD;ACK
1 / f
t
LOW
9
CLK
th
clock
t
clk(L)
t
HIGH
9
t
th
SU;STO
clock
70 %
30 %
LCD driver for low multiplex rates
t
VD;ACK
P
t
BUF
S
PCA85232
© NXP B.V. 2010. All rights reserved.
013aaa110
0.7 V
0.3 V
0.7 V
0.3 V
0.5 V
(V
0.5 V
001aah848
DD
DD
DD
DD
DD
= 5 V)
cont.
cont.
36 of 54
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