PCA8565BS NXP [NXP Semiconductors], PCA8565BS Datasheet - Page 23
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PCA8565BS
Manufacturer Part Number
PCA8565BS
Description
Real time clock/calendar
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PCA8565BS.pdf
(39 pages)
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NXP Semiconductors
PCA8565_2
Product data sheet
10.5.1 Addressing
10.5.2 Clock and calendar read/write cycles
10.5 I
Before any data is transmitted on the I
addressed first. The addressing is always carried out with the first byte transmitted after
the start procedure.
The PCA8565 acts as a slave receiver or slave transmitter. Therefore the clock signal SCL
is only an input signal, but the data signal SDA is a bidirectional line.
The PCA8565 slave address is shown in
The I
Figure
register is to be accessed next. The upper four bits of the word address are not used.
2
Fig 17. Slave address
Fig 18. Master transmits to slave receiver (write mode)
C-bus protocol
2
C-bus configuration for the different PCA8565 read and write cycles is shown in
18,
Figure 19
S
SLAVE ADDRESS
and
Rev. 02 — 16 June 2009
Figure
acknowledgement
R/W
from slave
0 A
1
20. The word address is a 4-bit value that defines which
group 1
0
WORD ADDRESS
2
1
C-bus, the device which should respond is
Figure
0
0
acknowledgement
group 2
17.
from slave
0
A
1
mce189
R/W
n bytes
DATA
Real time clock/calendar
memory word address
auto increment
acknowledgement
PCA8565
from slave
© NXP B.V. 2009. All rights reserved.
A
mbd822
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