M41ST85W_11 STMICROELECTRONICS [STMicroelectronics], M41ST85W_11 Datasheet - Page 28

no-image

M41ST85W_11

Manufacturer Part Number
M41ST85W_11
Description
3.0/3.3 V I2C combination serial RTC, NVRAM supervisor and microprocessor supervisor
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Clock operation
3.13
3.14
28/43
t
Bit D7 of clock register 04h contains the t
continuation of the deselect time after V
time before WRITEs may again be performed to the device after a power-down condition.
The t
Initial power-on defaults
Upon initial application of power to the device, the following register bits are set to a '0' state:
watchdog register, FT, AFE, ABE, SQWE, and TR. The following bits are set to a '1' state:
ST, OUT, and HT (see
Table 6.
1. Default setting
Table 7.
1. WDS, BMB0-BMB4, RB0, RB1.
2. State of other control bits undefined.
3. UC = Unchanged
Initial power-up
Subsequent power-up
(with battery backup)
rec
t
rec
rec
bit
bit (TR)
Condition
bit will allow the user to set the length of this deselect time as defined by
0
0
1
t
Default values
rec
(2)
definitions
(3)
STOP bit (ST)
Table
UC
TR
X
0
1
0
7).
Doc ID 7531 Rev 11
UC
ST
1
HT
CC
1
1
rec
reaches V
Min
bit (TR). t
96
40
50
Out
UC
1
t
rec
FT
0
0
PFD
rec
time
. This allows for a voltage settling
AFE ABE SQWE
refers to the automatic
0
0
200
2000
Max
98
(1)
0
0
0
0
Watchdog
register
M41ST85W
Units
ms
ms
Table
µs
0
0
(1)
6.

Related parts for M41ST85W_11