M41ST95WMH6TR STMICROELECTRONICS [STMicroelectronics], M41ST95WMH6TR Datasheet - Page 18

• Manufacturer Part Number: M41ST95WMH6TR
• Description: 5.0 or 3.0V, 512 bit (64 bit X 8) Serial RTC (SPI) SRAM and NVRAM Supervisor
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

M41ST95Y*, M41ST95W
To disable the alarm, write '0' to the Alarm Date
Register and to RPT1-5. The IRQ/FT/OUT output
is cleared by a READ to the Flags Register as
shown in Figure 14. A subsequent READ of the
Flags Register is necessary to see that the value
of the Alarm Flag has been reset to '0.'
The IRQ/FT/OUT pin can also be activated in the
battery back-up mode. The IRQ/FT/OUT will go
low if an alarm occurs and both ABE (Alarm in Bat-
tery Back-up Mode Enable) and AFE are set.
Figure 14. Alarm Interrupt Reset Waveform
Table 5. Alarm Repeat Mode
18/35
RPT5
1
1
1
1
1
0
ACTIVE FLAG
IRQ/FT/OUT
RPT4
0Eh
1
1
1
1
0
0
RPT3
1
1
1
0
0
0
0Fh
RPT2
The ABE and AFE Bits are reset during power-up,
therefore an alarm generated during power-up will
only set AF. The user can read the Flag Register
at system boot-up to determine if an alarm was
generated while the M41ST95Y/W was in the de-
select mode during power-up.
illustrates the back-up mode alarm timing.
1
1
0
0
0
0
RPT1
1
0
0
0
0
0
HIGH-Z
10h
Once per Second
Figure 15., page 19
Once per Minute
Once per Month
Alarm Setting
Once per Hour
Once per Year
Once per Day
AI03664