M48T212V-70MH1 STMICROELECTRONICS [STMicroelectronics], M48T212V-70MH1 Datasheet

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M48T212V-70MH1

Manufacturer Part Number
M48T212V-70MH1
Description
5V/3.3V TIMEKEEPER CONTROLLER Supervisor
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
FEATURES SUMMARY
April 2004
INTEGRATED REAL TIME CLOCK, POWER-
FAIL CONTROL CIRCUIT, BATTERY AND
CRYSTAL
CONVERTS LOW POWER SRAM INTO
NVRAMs
YEAR 2000 COMPLIANT (4-Digit Year)
BATTERY LOW FLAG
MICROPROCESSOR POWER-ON RESET
PROGRAMMABLE ALARM OUTPUT
ACTIVE IN THE BATTERY BACKED-UP
MODE
WATCHDOG TIMER
AUTOMATIC POWER-FAIL CHIP
DESELECT AND WRITE PROTECTION
CHOICE OF WRITE PROTECT VOLTAGES
(V
PACKAGING INCLUDES A 44-LEAD SOIC
AND SNAPHAT
separately)
PFD
M48T212Y: V
4.2V
M48T212V: V
2.7V
= Power-fail Deselect Voltage):
V
V
PFD
PFD
®
CC
CC
TOP (to be ordered
3.0V
4.5V
= 4.5 to 5.5V
= 3.0 to 3.6V
5.0V or 3.3V TIMEKEEPER
Figure 1. 44-pin SOIC Package
44
SNAPHAT (SH)
Crystal/Battery
SOH44 (MH)
1
M48T212Y
M48T212V
®
Supervisor
1/32

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M48T212V-70MH1 Summary of contents

Page 1

... AUTOMATIC POWER-FAIL CHIP DESELECT AND WRITE PROTECTION CHOICE OF WRITE PROTECT VOLTAGES (V = Power-fail Deselect Voltage): PFD – M48T212Y 4.5 to 5.5V CC 4.2V V 4.5V PFD – M48T212V 3.0 to 3.6V CC 2.7V V 3.0V PFD PACKAGING INCLUDES A 44-LEAD SOIC ® AND SNAPHAT TOP (to be ordered separately) April 2004 5.0V or 3.3V TIMEKEEPER Figure 1. 44-pin SOIC Package ...

Page 2

... M48T212Y, M48T212V TABLE OF CONTENTS FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 1. 44-pin SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. SOIC Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 4. Hardware Hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Address Decoding Table 2. Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 3. Truth Table for SRAM Bank Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 5. Chip Enable Control and Bank Select Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 4 ...

Page 3

... Figure 18.SH – 4-pin SNAPHAT Housing for 120mAh Battery & Crystal, Package Outline . . . . . . 29 Table 18. SH – 4-pin SNAPHAT Housing for 120mAh Battery & Crystal, Package Mech. Data PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 19. Ordering Information Example Table 20. SNAPHAT® Battery Table REVISION HISTORY Table 21. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 M48T212Y, M48T212V 3/32 ...

Page 4

... M48T212Y, M48T212V DESCRIPTION The M48T212Y/V are self-contained devices that include a real time clock (RTC), programmable alarms, a watchdog timer, and two external chip enable outputs which provide control four (two in parallel) external low-power static RAMs. ® Access to all TIMEKEEPER external RAM is the same as conventional byte- wide SRAM ...

Page 5

... V OUT CON IRQ/FT Vccsw V OUT V AI03019 M48T212Y, M48T212V Address Inputs Data Inputs/Outputs Reset 1 Input Reset 2 Input Reset Output (Open Drain) Watchdog Input Bank Select Input Chip Enable Input External Chip Enable Input Output Enable Input WRITE Enable Input RAM Chip Enable 1 Output ...

Page 6

... M48T212Y, M48T212V Figure 3. SOIC Connections 6/32 RSTIN1 1 44 RSTIN2 2 43 RST M48T212Y M48T212V WDI CON 18 27 DQ0 19 26 DQ1 20 25 DQ2 21 24 ...

Page 7

... If the second chip enable pin (E2) is unused, it should be tied to V A0-A18 A0-A3 V CCSW OUT CON Note CON WDI RSTIN1 RSTIN2 RST DQ0-DQ7 IRQ/ M48T212Y/V to external SRAM should be as short as possible. CON . OUT M48T212Y, M48T212V MOTOROLA MTD20P06HDL A0-Axx (3) CMOS SRAM E A0-Axx V CC (3) CMOS E2 SRAM E AI03046 7/32 ...

Page 8

... M48T212Y, M48T212V OPERATION Automatic backup and write protection for an ex- ternal SRAM is provided through V and E2 pins. (Users are urged to insure that CON voltage specifications, for both the SUPERVISOR chip and external SRAM chosen, are similar). The ® SNAPHAT containing the lithium energy source ...

Page 9

... Table 4. Chip Enable Control and Bank Select Characteristics Symbol Parameter EXPD CON CON APD CON CON tEXPD tEXPD M48T212Y Min (Low or High) (Low or High) M48T212Y, M48T212V tAPD AI02639 M48T212V –70 –85 Max Min Max Unit ns ns 9/32 ...

Page 10

... M48T212Y, M48T212V READ Mode The M48T212Y/V executes a READ cycle when- ever W (WRITE Enable) is high and E (Chip En- able) is low. The unique address specified by the address inputs (A3-A0) defines which one of the ® on-chip TIMEKEEPER registers access- ed. When the address M48T212Y the range of 0h-Fh, one of the ...

Page 11

... EX low simultaneously to avoid bus conten- af- WHDX tion. WRITE WRITE tAVAV tAVAV tAVEH tAVWH tELEH tEHAX tWHAX tEHDX tWLWH tEHQZ tDVEH tDVWH DATA IN VALID M48T212Y, M48T212V after W falls. WLQZ ® registers will be selected READ tAVAV tAVQV tGLQV tWHQX tWLQZ tWHDX DATA IN DATA OUT VALID VALID AI02641 11/32 ...

Page 12

... M48T212Y, M48T212V Table 6. WRITE Mode AC Characteristics Symbol Parameter t Write Cycle Time AVAV t Address Valid to Write Enable Low AVWL t Address Valid to Chip Enable Low AVEL t Write Enable Pulse Width WLWH t Chip Enable Low to Chip Enable High ELEH t Write Enable High to Address Transition ...

Page 13

... The available battery capacity for the SNAPHAT by this current to determine the amount of data re- tention available (see For a further more detailed review of lifetime calcu- lations, please see Application Note AN1012. M48T212Y, M48T212V falls below V CC PFD = 2.0V. The chip enable access time must . ...

Page 14

... M48T212Y, M48T212V CLOCK OPERATION ® TIMEKEEPER Registers The M48T212Y/V offers 16 internal registers ® which contain TIMEKEEPER Flag, and Control data. These registers are mem- ory locations which contain external (user accessi- ble) and internal copies of the data (usually ™ referred to as BiPORT TIMEKEEPER cells) ...

Page 15

... AFE = Alarm Flag Enable Flag RB0-RB1 = Watchdog Resolution Bits WDS = Watchdog Steering Bit ABE = Alarm in Battery Back-Up Mode Enable Bit RPT1-RPT5 = Alarm Repeat Mode Bits WDF = Watchdog Flag (Read only Alarm Flag (Read only '1' or '0' M48T212Y, M48T212V Function/Range BCD Format D1 D0 Year Year Month ...

Page 16

... M48T212Y, M48T212V Setting the Alarm Clock Address locations 6h-2h contain the alarm set- tings. The alarm can be configured to go off at a prescribed time on a specific month, date, hour, minute, or second or repeat every year, month, day, hour, minute, or second. It can also be pro- grammed to go off while the M48T212Y the battery back-up to serve as a system wake-up call ...

Page 17

... Watchdog Register is cleared. If the watchdog function is set to output to the IRQ/FT pin and the frequency test function is activated, the watchdog or alarm function prevails and the frequency test function is denied. M48T212Y, M48T212V tREC HIGH-Z AI03622 if not used. The watchdog ...

Page 18

... M48T212Y, M48T212V V Switch Output CC Vccsw output goes low when V V turning on a customer supplied P-Channel CC MOSFET (see Figure 4., page MTD20P06HDL is recommended. This MOSFET in turn connects separate supply when OUT the current requirement is greater than I Table 14., page 25). This output may also be used ...

Page 19

... Byte does not affect the Frequency test output fre- quency. The IRQ/FT pin is an open drain output which re- quires a pull-up resistor to V tion. A 500-10k resistor is recommended in order to control the rise time. The FT Bit is cleared on power-up. M48T212Y, M48T212V example, a reading of for proper opera- CC ...

Page 20

... M48T212Y, M48T212V Battery Low Warning The M48T212Y/V automatically performs battery voltage monitoring upon power-up and at factory- programmed time intervals of approximately 24 hours. The Battery Low (BL) Bit, Bit D4 of Flags Register 0h, will be asserted if the battery voltage is found to be less than approximately 2.5V. The BL Bit will remain asserted until completion of bat- ...

Page 21

... Figure 11. Crystal Accuracy Across Temperature Frequency (ppm –20 –40 –60 –80 –100 –120 –140 –160 –40 –30 –20 Figure 12. Calibration Waveform NORMAL POSITIVE CALIBRATION NEGATIVE CALIBRATION F = -0.038 ppm ( – Temperature C M48T212Y, M48T212V AI00999 AI00594B 21/32 ...

Page 22

... M48T212Y, M48T212V V Noise And Negative Going Transients CC I transients, including those produced by output CC switching, can produce voltage fluctuations, re- sulting in spikes on the V bus. These transients CC can be reduced if capacitors are used to store en- ergy which stabilizes the V CC stored in the bypass capacitors will be released as low going spikes are generated or energy will be absorbed when overshoots occur ...

Page 23

... Exposure to Absolute Maximum Rat- ing conditions for extended periods may affect de- vice reliability. STMicroelectronics SURE Program and other rel- evant quality documents. Parameter ® SNAPHAT SOIC M48T212Y M48T212V M48T212Y, M48T212V Refer also to the Value Unit °C – °C –55 to 125 ° ...

Page 24

... Input Capacitance IN (3) Input/Output Capacitance C OUT Note: 1. Effective capacitance measured with power supply at 5V (M48T212Y) or 3.3V (M48T212V); sampled only, not 100% tested 25° 1MHz. 3. Outputs deselected. 24/32 ment Conditions listed in the relevant tables. De- signers should check that the operating conditions in their projects match the measurement condi- tions when using the quoted parameters ...

Page 25

... V A through 100K resistor. WDI internally pulled-down can only sustain CMOS leakage currents in the battery back-up mode. Higher leakage cur- CON ® SUPERVISOR chip V specification. CC M48T212Y, M48T212V M48T212V –85 Max Min Typ ±1 ± ...

Page 26

... M48T212Y, M48T212V Figure 15. Power Down/Up Mode AC Waveforms PFD (max) V PFD (min INPUTS VALID OUTPUTS VALID RST V CCSW Table 15. Power Down/Up Mode AC Characteristics Symbol t V (max PFD PFD t V (min PFD (min PFD PFD (min) V ...

Page 27

... Min Max 3.05 0.05 0.36 2.34 2.69 0.36 0.46 0.15 0.32 17.71 18.49 8.23 8.89 – – 3.20 3.61 11.51 12.70 0.41 1.27 0° 8° 44 0.10 M48T212Y, M48T212V inches Typ Min 0.002 0.092 0.014 0.006 0.697 0.324 0.032 – 0.126 0.453 0.016 0° 44 Max 0.120 0.014 0.106 0.018 0.012 0.728 0.350 – 0.142 0.500 0.050 8° 0.004 ...

Page 28

... M48T212Y, M48T212V Figure 17. SH – 4-pin SNAPHAT Housing for 48 mAh Battery & Crystal, Package Outline Note: Drawing is not to scale. Table 17. SH – 4-pin SNAPHAT Housing for 48 mAh Battery & Crystal, Package Mech. Data Symb Typ 28/ ...

Page 29

... Table 18. SH – 4-pin SNAPHAT Housing for 120mAh Battery & Crystal, Package Mech. Data Symb Typ Min Max 10.54 8.00 8.51 7.24 8.00 0.38 0.46 0.56 21.21 21.84 17.27 18.03 15.55 15.95 3.20 3.61 2.03 2.29 M48T212Y, M48T212V SHTK-A inches Typ Min Max 0.415 0.315 .0335 0.285 0.315 0.015 0.018 0.022 0.835 0.860 0.680 .0710 0.612 0.628 0.126 0.142 0.080 0.090 29/32 ...

Page 30

... Supply and Write Protect Voltage 212Y = V = 4.5 to 5.5V; 4. 212V = V = 3.0 to 3.6V; 2. Speed –70 = 70ns (for M48T212Y) –85 = 85ns (for M48T212V) Package ( SOH44 Temperature Range 70° –40 to 85°C Shipping Method blank = Tubes (Not for New Design - Use Lead-free Package (ECO ...

Page 31

... Hookup (Figure 4); Improve text in “Setting the Alarm Clock” section 13-May-02 4.1 Modify reflow time and temperature footnote (Table 11) 16-Jul-02 4.1 Updated DC Characteristics, footnotes (Table 14) 27-Mar-03 5.0 v2.2 template applied; updated test condition (Table 14) 31-Mar-04 6.0 Reformatted; updated with Pb-free information (Table 11, 19) Revision Details 16 changed M48T212Y, M48T212V 31/32 ...

Page 32

... M48T212Y, M48T212V Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...

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