DS152 XILINX [Xilinx, Inc], DS152 Datasheet - Page 38
DS152
Manufacturer Part Number
DS152
Description
Virtex-6 FPGA Data Sheet: DC and Switching Characteristics
Manufacturer
XILINX [Xilinx, Inc]
Datasheet
1.DS152.pdf
(56 pages)
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CLB Shift Register Switching Characteristics (SLICEM Only)
Table 55: CLB Shift Register Switching Characteristics
DS152 (v2.10) October18, 2010
Advance Product Specification
Notes:
1.
Sequential Delays
T
T
T
Setup and Hold Times Before/After Clock CLK
T
T
T
Clock CLK
T
REG
REG_MUX
REG_M31
WS
CECK
DS
MPW
/T
A Zero “0” Hold Time listing indicates no hold time or a negative hold time. Negative values cannot be guaranteed “best-case”, but if a “0” is
listed, there is no positive hold time.
/T
DH
WH
/T
Symbol
CKCE
Clock to A – D outputs
Clock to AMUX – DMUX output
Clock to DMUX output via M31 output
WE input
CE input to CLK
A – D inputs to CLK
Minimum pulse width
Description
www.xilinx.com
Virtex-6 FPGA Data Sheet: DC and Switching Characteristics
–0.01
0.05/
0.06/
0.64/
1.11
1.37
1.08
0.00
0.18
0.60
-3
–0.01
0.07/
0.08/
0.76/
1.30
1.60
1.27
0.00
0.21
0.70
Speed Grade
-2
–0.01
0.09/
0.10/
0.94/
1.58
1.93
0.00
0.24
0.85
1.55
-1
0.11/
0.12/
1.07/
1.74
2.12
1.74
0.03
0.02
0.23
0.89
-1L
ns, Max
ns, Max
ns, Max
ns, Min
ns, Min
ns, Min
ns, Min
Units
38
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