AD5755-1_11 AD [Analog Devices], AD5755-1_11 Datasheet - Page 31

• Manufacturer Part Number: AD5755-1_11
• Description: Quad Channel, 16-Bit,Serial Input, 4 mA to 20 mA and Voltage Output DAC,Dynamic Power Control
• Manufacturer: AD [Analog Devices]

PROGRAMMING SEQUENCE TO WRITE/ENABLE
THE OUTPUT CORRECTLY
To correctly write to and set up the part from a power-on
condition, use the following sequence:
1.
2.
3.
4.
5.
A flowchart of this sequence is shown in Figure 75.
Figure 75. Programming Sequence for Enabling the Output Correctly
Perform a hardware or software reset after initial power-on.
The dc-to-dc converter supply block must be configured.
Set the dc-to-dc switching frequency, maximum output
voltage allowed, and the phase that the four dc-to-dc
channels clock at.
Configure the DAC control register on a per channel basis.
The output range is selected, and the dc-to-dc converter
block is enabled (DC_DC bit). Other control bits can be
configured at this point. Set the INT_ENABLE bit; however,
the output enable bit (OUTEN) should not be set.
Write the required code to the DAC data register. This
implements a full DAC calibration internally. Allow at least
200 μs before Step 5 for reduced output glitch.
Write to the DAC control register again to enable the
output (set the OUTEN bit).
STEP 1: PERFORM A SOFTWARE/HARDWARE RESET.
STEP 2: WRITE TO DC-TO-DC CONTROL REGISTER TO
STEP 3: WRITE TO DAC CONTROL REGISTER. SELECT
STEP 4: WRITE TO EACH/ALL DAC DATA REGISTERS.
STEP 5: WRITE TO DAC CONTROL REGISTER. RELOAD
THE DAC CHANNEL AND OUTPUT RANGE.
BITS AS REQUIRED. SET THE INT_ENABLE BIT
BUT DO NOT SELECT THE OUTEN BIT.
SET DC-TO-DC CLOCK FREQUENCY, PHASE,
AND MAXIMUM VOLTAGE.
SET THE DC_DC BIT AND OTHER CONTROL
SEQUENCE AS IN STEP 3 ABOVE. THIS TIME
SELECT THE OUTEN BIT TO ENABLE
THE OUTPUT.
ALLOW AT LEAST 200µs BETWEEN STEP 3
AND STEP 5 FOR REDUCED OUTPUT GLITCH.
POWER ON.
Rev. A | Page 31 of 48
CHANGING AND REPROGRAMMING THE RANGE
When changing between ranges, the same sequence as
described in the Programming Sequence to Write/Enable the
Output Correctly section should be used. It is recommended to
set the range to its zero point (can be midscale or zero scale)
prior to disabling the output. Because the dc-to-dc switching
frequency, maximum voltage, and phase have already been
selected, there is no need to reprogram these. A flowchart of
this sequence is shown in Figure 76.
STEP 1: WRITE TO CHANNEL’S DAC DATA
STEP 2: WRITE TO DAC CONTROL REGISTER.
STEP 3: WRITE VALUE TO THE DAC DATA REGISTER.
STEP 4: WRITE TO DAC CONTROL REGISTER.
Figure 76. Steps for Changing the Output Range
REGISTER. SET THE OUTPUT
TO 0V (ZERO OR MIDSCALE).
DISABLE THE OUTPUT (OUTEN = 0), AND
SET THE NEW OUTPUT RANGE. KEEP THE
DC_DC BIT AND THE INT_ENABLE BIT SET.
RELOAD SEQUENCE AS IN STEP 2 ABOVE.
THIS TIME SELECT THE OUTEN BIT TO
ENABLE THE OUTPUT.
CHANNEL’S OUTPUT IS ENABLED.
AD5755-1