MAX5886EGK MAXIM [Maxim Integrated Products], MAX5886EGK Datasheet - Page 16

• Manufacturer Part Number: MAX5886EGK
• Description: 3.3V, 12-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS Inputs
• Manufacturer: MAXIM [Maxim Integrated Products]

In this package, the data converter die is attached to
an EP lead frame with the back of this frame exposed at
the package bottom surface, facing the PC board side
of the package. This allows a solid attachment of the
package to the PC board with standard infrared (IR)
flow soldering techniques. A specially created land pat-
tern on the PC board, matching the size of the EP (6mm
✕
of the DAC. Designing vias*** into the land area and
implementing large ground planes in the PC board
design allow for highest performance operation of the
DAC. An array of at least 4
per via hole and 1.2mm pitch between via holes) is rec-
ommended for this 68-pin QFN-EP package.
Integral nonlinearity is the deviation of the values on an
actual transfer function from either a best straight line fit
(closest approximation to the actual transfer curve) or a
line drawn between the end points of the transfer func-
tion, once offset and gain errors have been nullified. For
a DAC, the deviations are measured at every individual
step.
3.3V, 12-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputs
Figure 13. Recommended Power-Supply Decoupling and Bypassing Circuitry
16
***Vias connect the land pattern to internal or external copper planes. It is important to connect as many vias as possible to the analog
Static Performance Parameter Definitions
6mm), ensures the proper attachment and grounding
ground plane to minimize inductance.
______________________________________________________________________________________
12
B0–B11
AV
BYPASSING—DAC LEVEL
DD
AGND
DV
MAX5886
Integral Nonlinearity (INL)
✕
0.1µF
DD
DGND
4 vias (≤0.3mm diameter
VCLK
0.1µF
CLKGND
0.1µF
OUTN
OUTP
1µF
1µF
1µF
Differential nonlinearity is the difference between an
actual step height and the ideal value of 1 LSB. A DNL
error specification of less than 1 LSB guarantees no
missing codes and a monotonic transfer function.
The offset error is the difference between the ideal and
the actual offset current. For a DAC, the offset point is
the average value at the output for the two midscale
digital input codes with respect to the full scale of the
DAC. This error affects all codes by the same amount.
A gain error is the difference between the ideal and the
actual full-scale output voltage on the transfer curve,
after nullifying the offset error. This error alters the slope
of the transfer function and corresponds to the same
percentage error in each step.
The settling time is the amount of time required from the
start of a transition until the DAC output settles its new
output value to within the converter’s specified accuracy.
DV
VCLK
AV
CC
CC
10µF
10µF
10µF
BYPASSING—BOARD LEVEL
FERRITE BEAD
FERRITE BEAD
FERRITE BEAD
47µF
47µF
47µF
Differential Nonlinearity (DNL)
ANALOG POWER-SUPPLY
SOURCE
DIGITAL POWER-SUPPLY
SOURCE
CLOCK POWER-SUPPLY
SOURCE
Settling Time
Offset Error
Gain Error