MAX5888AEGK MAXIM [Maxim Integrated Products], MAX5888AEGK Datasheet - Page 4

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MAX5888AEGK

Manufacturer Part Number
MAX5888AEGK
Description
3.3V, 16-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS Inputs
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
MAX5888AEGK+D
Manufacturer:
Maxim Integrated Products
Quantity:
135
ELECTRICAL CHARACTERISTICS (continued)
(AV
analog output, 50Ω double terminated (Figure 7), I
production test, <+25°C guaranteed by design and characterization. Typical values are at T
3.3V, 16-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputs
4
TIMING CHARACTERISTICS
Data to Clock Setup Time
Data to Clock Hold Time
Data Latency
Minimum Clock Pulse Width High
Minimum Clock Pulse Width Low
LVDS LOGIC INPUTS (B0N–B15N, B0P–B15P)
Differential Input Logic High
Differential Input Logic Low
Common-Mode Voltage Range
Differential Input Resistance
Input Capacitance
CMOS LOGIC INPUTS (PD, SEL0)
Input Logic High
Input Logic Low
Input Leakage Current
Input Capacitance
CLOCK INPUTS (CLKP, CLKN)
Differential Input Voltage Swing
Differential Input Slew Rate
Common-Mode Voltage Range
Input Resistance
Input Capacitance
POWER SUPPLIES
Analog Supply Voltage Range
Digital Supply Voltage Range
Clock Supply Voltage Range
Analog Supply Current
Digital Supply Current
Clock Supply Current
DD
_______________________________________________________________________________________
= DV
PARAMETER
DD
= VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference, V
SYMBOL
t
SR
t
I
V
V
DV
I
SETUP
C
AV
I
V
R
V
HOLD
DVDD
AVDD
VCLK
t
R
C
C
t
V
COM
V
COM
V
V
I
CH
CLK
CLK
CLK
CLK
CL
IN
CLK
IH
IN
IH
IL
IN
IL
IN
DD
DD
Referenced to rising edge of clock (Note 4)
Referenced to rising edge of clock (Note 4)
CLKP, CLKN
CLKP, CLKN
Sine wave
Square wave
(Note 5)
f
Power-down
f
Power-down
f
Power-down
CLK
CLK
CLK
OUT
= 100Msps, f
= 100Msps, f
= 100Msps, f
= 20mA, T
CONDITIONS
A
OUT
OUT
OUT
= T
MIN
= 1MHz
= 1MHz
= 1MHz
to T
MAX
, unless otherwise noted. ≥+25°C guaranteed by
REFIO
A
= 1.25V, differential transformer-coupled
= +25°C.)
DV
1.125
3.135
3.135
3.135
0.7
MIN
-0.8
100
-15
1.8
85
DD
±20%
>100
≥1.5
≥0.5
TYP
100
1.5
3.3
3.3
3.3
0.3
5.6
3.5
0.9
0.9
27
10
10
5
5
5
5
7
DV
1.375
3.465
3.465
3.465
0.3
MAX
-100
+15
125
DD
UNITS
cycles
Clock
V
V/µs
mV
mV
mA
mA
mA
pF
µA
pF
kΩ
pF
µA
µA
ns
ns
ns
ns
V
V
V
P-P
V
V
V
V

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