MAX6850 MAXIM [Maxim Integrated Products], MAX6850 Datasheet - Page 23

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MAX6850

Manufacturer Part Number
MAX6850
Description
4-Wire Interfaced, 7-, 14-, and 16-Segment Alphanumeric Vacuum-Fluorescent Display Controller
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
4-Wire Interfaced, 7-, 14-, and 16-Segment Alpha-
Table 27. Intensity Register Format
The grids register sets how many grids are multiplexed
from 1 to 48 (Table 26).
When the grids register is written, the external VFD tube
driver is presumed to contain invalid data. The
VFBLANK output is used to disable the VFD tube driver
for the first multiplex cycle after exiting shutdown, clear-
ing any invalid data. The next multiplex cycle uses
newly sent, valid data. If the grids register is written
with an out-of-range value of 0x30 to 0xFF, then the
value 0x2F is stored instead.
Digital control of display brightness is provided by
pulse-width modulation of the tube blanking time, which
is controlled by the lower nibble of the intensity register
(Table 27). The modulator scales the VFBLANK output
in 15 steps from a minimum of 1/16 up to 15/16 of each
grid’s multiplex period. Figure 13 shows the modulator
behavior when the VFBLANK polarity register is set to
15/16 (max on) High for 6.25µs, low for 93.75µs
DUTY CYCLE
1/16 (min on)
numeric Vacuum-Fluorescent Display Controller
10/16
11/16
12/16
13/16
14/16
15/16
2/16
3/16
4/16
5/16
6/16
7/16
8/16
9/16
High for 6.25µs, low for 6.25µs, high for 87.5µs
High for 6.25µs, low for 12.5µs, high for
81.25µs
High for 6.25µs, low for 18.75µs, high for 75µs
High for 6.25µs, low for 25µs, high for 68.75µs
High for 6.25µs, low for 31.25µs, high for
62.5µs
High for 6.25µs, low for 37.5µs, high for
56.25µs
High for 6.25µs, low for 43.75µs, high for 50µs
High for 6.25µs, low for 50µs, high for 43.75µs
High for 6.25µs, low for 56.25µs, high for
37.5µs
High for 6.25µs, low for 62.5µs, high for
31.25µs
High for 6.25µs, low for 68.75µs, high for 25µs
High for 6.25µs, low for 75µs, high for 18.75µs
High for 6.25µs, low for 81.25µs, high for
12.5µs
High for 6.25µs, low for 87.5µs, high for 6.25µs
High for 6.25µs, low for 93.75µs
______________________________________________________________________________________
VFBLANK BEHAVIOR
(OSC = 4MHz)
Intensity Register
Grids Register
COMMAND
ADDRESS
0x00 (Table 28), so VFBLANK is high to disable (blank)
the display.
The minimum off-time period of a 1/16 multiplex period
(6.25µs with OSC = 4MHz) is always at the start of the
multiplex cycle. This allows time for slow display drivers
to turn off, and slow display phosphors time to decay
between grids. Thus, image ghosting is avoided. If a
display has very slow phosphor, then the allowed decay
time can be doubled by not using a 15/16 duty cycle.
The VFBLANK polarity register sets the active level of
the VFBLANK output pin (Table 28).
A write to the no-op register is ignored.
Writing the display-test and device ID register switches
the drivers between one of two modes: normal and dis-
play test. Display-test mode turns all segments and
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
0x02
Display-Test and Device ID Register
D7
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
D6
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
D5
REGISTER DATA
VFBLANK Polarity Register
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
D4
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
No-Op Register
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
CODE
0xXC
0xXD
0xXA
0xXB
0xXE
0xX0
0xX1
0xX2
0xX3
0xX4
0xX5
0xX6
0xX7
0xX8
0xX9
0xXF
HEX
23

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