MAX6850 MAXIM [Maxim Integrated Products], MAX6850 Datasheet - Page 25

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MAX6850

Manufacturer Part Number
MAX6850
Description
4-Wire Interfaced, 7-, 14-, and 16-Segment Alphanumeric Vacuum-Fluorescent Display Controller
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
4-Wire Interfaced, 7-, 14-, and 16-Segment Alpha-
Table 28. VFBLANK Polarity Register Format
Table 29. Display-Test and Device ID Register Format
Table 30. Shift-Limit Register Format
annunciators on and sets the duty cycle to 7/16 (half-
power) (Table 29).
Reading the display-test and device ID register returns
the MAX6850 device ID 0b0000 010 that identifies the
driver type, plus the display-test status in the LSB.
The output serial interface is used to transfer display
data from the MAX6850 to the display driver. The serial
interface bit-stream output length is programmable up
to 84 bits, which are labeled DD0–DD83. Set the num-
ber of bits with the shift-limit register, address 0x0E. If
the shift-limit register is written with an out-of-range
value 0x54 to 0xFF, then the value 0x53 is stored
instead. Table 30 shows the shift-limit register.
The output map comprises 84 words of 7-bit RAM. The
output map data should be written when the MAX6850
is configured after power-up. Table 31 shows the out-
put map RAM codes.
The output map is an indirect addressing reference
table. It translates bit position in the output shift register
(valid range: from zero to the value in shift-limit register
0E, which has a maximum of 83) to bit function. Any
output shift-register bit position may be set to any grid
Normal operation
Display test
Read MAX6850 device ID and display test status
Minimum setting example (01)
Maximum setting example (83 or 0x53)
VFBLANK is high to disable the display.
VFBLANK is low to disable the display.
numeric Vacuum-Fluorescent Display Controller
SHIFT LIMIT
______________________________________________________________________________________
GRIDS
Output Shift-Limit Register
MODE
Output Map
COMMAND
ADDRESS
COMMAND
0x0E
0x0E
ADDRESS
0x01
0x01
COMMAND
ADDRESS
0x07
0x07
0x87
D7
0
0
character segment, DP segment, annunciator segment,
or cursor segment.
The power-up default pattern for output map RAM
maps a 40-digit, two-digits-per-grid display with DPs
and cursors (Table 32).
If the user selects an unused map RAM entry (88–127)
for an output shift-register position, then the correspond-
ing output bit is always low (segment or grid OFF).
When selecting an invalid map RAM entry (for example,
codes 48 to 83 to select annunciators in 96/2 mode,
which does not support annunciators), the correspond-
ing output bit is always low (segment or grid OFF).
If the map RAM entry corresponds to a nonexistent font
segment (no action in Table 32) when the digit data is
processed through the character font, then the result
again is zero (segment or grid OFF).
The output map data is indirectly accessed by an
autoincrementing output map address pointer in the
MAX6850 at address 0x06. The output map address
pointer can be written (i.e., set to an address between
0x00 and 0x53) but cannot be read back. The output
map data is written and read back through the output
map address pointer.
D7
X
X
D6
D7
0
1
X
X
0
D6
X
X
D5
0
0
D6
X
X
0
REGISTER DATA
D5
X
X
REGISTER DATA
D4
0
1
D5
X
X
0
D4
X
X
REGISTER DATA
D3
0
0
D4
X
X
0
D3
X
X
D2
0
0
D2
D3
X
X
X
X
0
D1
0
1
D1
0
1
D2
X
X
1
D0
1
1
D0
0
0
D1
HEX CODE
X
X
0
0x01
0x53
CODE
0xX0
0xX2
HEX
D0
DT
0
1
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